Method of manufacturing enhanced thermal dissipation integrated circuit package

• US 20040046241A1
• Filed: 08/11/2003
• Published: 03/11/2004
• Est. Priority Date: 03/22/2002
• Status: Abandoned Application

• Current Assignee: ASAT Company Limited
• Original Assignee: ASAT Company Limited
• Inventors: Fan, Chun H., Combs, Edward G., McLellan, Neil Robert
• Application Number:
  US10/638,606
• Publication Number:
  US 20040046241A1
• Time in Patent Office: Days
• US Class Current: 257/678
• CPC Class Codes: H01L 2224/05571 the external layer being disposed in a recess of the surface
• CPC Class Codes: H01L 2224/05573 Single external layer
• CPC Class Codes: H01L 2224/05599 Material
• CPC Class Codes: H01L 2224/16225 the item being non-metallic, e.g. insulating substrate with or without metallisation
• CPC Class Codes: H01L 2224/16235 the bump connector connecting to a via metallisation of the item
• CPC Class Codes: H01L 2224/32225 the item being non-metallic, e.g. insulating substrate with or without metallisation
• CPC Class Codes: H01L 2224/45144 Gold (Au) as principal constituent
• CPC Class Codes: H01L 2224/48091 Arched
• CPC Class Codes: H01L 2224/48227 connecting the wire to a bond pad of the item
• CPC Class Codes: H01L 2224/48465 the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
• CPC Class Codes: H01L 2224/73265 Layer and wire connectors
• CPC Class Codes: H01L 2224/97 the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
• CPC Class Codes: H01L 23/3128 the substrate having spherical bumps for external connection
• CPC Class Codes: H01L 23/4334 Auxiliary members in encapsulations H01L23/49568 takes precedence
• CPC Class Codes: H01L 24/45 of an individual wire connector
• CPC Class Codes: H01L 24/48 of an individual wire connector
• CPC Class Codes: H01L 24/97 the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00012 Relevant to the scope of the group, the symbol of which is combined with the symbol of this group
• CPC Class Codes: H01L 2924/00014 the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/01005 : Boron [B]
• CPC Class Codes: H01L 2924/01006 : Carbon [C]
• CPC Class Codes: H01L 2924/01013 : Aluminum [Al]
• CPC Class Codes: H01L 2924/01029 : Copper [Cu]
• CPC Class Codes: H01L 2924/01033 : Arsenic [As]
• CPC Class Codes: H01L 2924/01079 : Gold [Au]
• CPC Class Codes: H01L 2924/01082 : Lead [Pb]
• CPC Class Codes: H01L 2924/14 : Integrated circuits
• CPC Class Codes: H01L 2924/15311 : being a ball array, e.g. BGA
• CPC Class Codes: H01L 2924/16152 : Cap comprising a cavity for hosting the device, e.g. U-shaped cap
• CPC Class Codes: H01L 2924/181 : Encapsulation

Abstract

The present invention relates to an integrated circuit packages having a thermally conductive element thermally coupled to a heat sink and semiconductor die, and a method of manufacturing said integrated circuit package.

Claims

1. An integrated circuit package, comprising:

a semiconductor die electrically connected to a substrate;

a heat sink having a top portion and a plurality of side portions forming a substantially dome-like shape, wherein at least one of said side portions of said heat sink is attached to said substrate;

a thermally conductive element thermally coupled with and interposed between at least a portion of said semiconductor die and at least a portion of said heat sink; and

an encapsulant material encapsulating said heat sink such that a portion of said heat sink is exposed to surroundings of said package.

2. The integrated circuit package of claim 1, wherein a distance between said thermally conductive element and said semiconductor die is five (5) mils or less.

3. The integrated circuit package of claim 1, wherein a major dimension of said thermally conductive element is smaller than a distance between two opposing rows of die pads of said semiconductor die.

4. The integrated circuit package of claim 3, wherein a surface of said thermally conductive element aligns below a height of a plurality of bond wires.

5. The integrated circuit package of claim 1, wherein said heat sink is made of a material from a group consisting of copper, aluminum, copper alloy, and aluminum alloy.

6. The integrated circuit package of claim 1, wherein said thermally conductive element is made of a material from a group consisting of alumina, aluminum nitride, beryllium oxide, ceramic material, copper, diamond compound, and metal.

7. The integrated circuit package of claim 1, wherein said heat sink comprises an oxide coating.

8. The integrated circuit package of claim 1, wherein said heat sink is mounted to said substrate by a thermally conductive adhesive.

9. The integrated circuit package of claim 1, wherein said semiconductor die is electrically connected to said substrate by a direct chip attachment.

10. An integrated circuit package, comprising:

a semiconductor die electrically connected to a substrate;

a heat sink having a top portion and a plurality of side portions forming a substantially dome-like shape;

means for thermally coupling said semiconductor die with said heat sink to dissipate heat from said semiconductor die to surroundings of said package; and

means for encapsulating said heat sink such that a portion of said heat sink is exposed to surroundings of said package.

11. An integrated circuit package, comprising:

a substrate comprising;

a first substrate surface with an electrically conductive trace formed thereon; and

a second substrate surface with a plurality of solder balls electrically connected thereto, wherein said trace and at least one of said plurality of solder balls are electrically connected;

a semiconductor die mounted on said first substrate surface, wherein said semiconductor is electrically connected to said trace;

a heat sink having a top portion and a plurality of side portions, wherein a thermally conductive adhesive attaches said side portions to said substrate;

a thermally conductive element thermally coupled with and interposed between at least a portion of said semiconductor die and at least a portion of said heat sink, wherein said thermally conductive element is not in direct contact with said semiconductor die, a surface of said thermally conductive element aligns below a height of a plurality of bond wires, and an electrically and thermally conductive adhesive attaches said heat sink with said thermally conductive element; and

an encapsulant material encapsulating at least a portion of said first substrate surface and substantially all of said heat sink except said top portion.

12. The integrated circuit package of claim 11, wherein a distance between said thermally conductive element and said semiconductor die is five (5) mils or less.

13. The integrated circuit package of claim 11, wherein a major dimension of said thermally conductive element is smaller than a distance between two opposing rows of die pads of said semiconductor.

14. The integrated circuit package of claim 13, wherein a surface of said thermally conductive element aligns below a height of a plurality of bond wires.

15. The integrated circuit package of claim 11, wherein said heat sink is made of a material from a group consisting of copper, aluminum, copper alloy, and aluminum alloy.

16. The integrated circuit package of claim 11, wherein said thermally conductive element is made of a material from a group consisting of alumina, aluminum nitride, beryllium oxide, ceramic material, copper, diamond compound, and metal.

17. The integrated circuit package of claim 11, wherein said heat sink comprises an oxide coating.

18. The integrated circuit package of claim 11, wherein said semiconductor die is electrically connected to said first substrate surface of said substrate by direct chip attachment.

19. An integrated circuit package, comprising:

a substrate comprising;

means for electrically interconnecting a semiconductor die; and

means for exchanging electrical signals with an outside device;

said semiconductor die attached and electrically connected to said substrate by attachment means;

a heat sink having a dome-like means for dissipating thermal energy to surroundings of said package;

means for thermally coupling said heat sink with said semiconductor die, wherein said means for thermally coupling is interposed between at least a portion of said semiconductor die and at least a portion of said heat sink; and

means for encapsulating said heat sink such that a portion of said heat sink is exposed to surroundings of said package.

20. A method of manufacturing an integrated circuit package, comprising

attaching a semiconductor die to a substrate;

aligning an assembly over said semiconductor die, wherein said assembly comprises a heat sink and a thermally conductive element;

resting said assembly on said substrate such that said thermally conductive element does not contact said semiconductor die, and

encapsulating said assembly to form a prepackage such that a portion of said heat sink is exposed to surrounding of said prepackage.

21. The method of claim 20, wherein said assembly is rested on said substrate such that said thermally conductive element and said semiconductor die are separated by a distance of about five (5) mils or less.

22. The method of claim 20, wherein a surface of the thermally conductive element aligns below a height of a bond wire.

23. The method of claim 20, wherein said attaching said semiconductor die to said substrate is by direct chip attachment.

24. The method of claim 20, further comprising singulating said prepackage to form said package.

25. The method of claim 20, further comprising forming a substantially dome-shaped heat sink comprising a flat top portion and a plurality of straight side portions.

26. A method of manufacturing an integrated circuit package, comprising:

attaching a semiconductor die to a substrate;

attaching an assembly to said substrate, wherein said assembly comprises a heat sink and a thermally conductive element; and

encapsulating said heat sink such that a portion of said heat sink is exposed to surroundings of said package.

27. The method of claim 26, wherein said assembly is attached to said substrate such that said thermally conductive element and semiconductor die are separated by a distance of five (5) mils or less.

28. The method of claim 26, wherein a surface of the thermally conductive element aligns below a height of a plurality of bond wires.

29. The method of claim 26, wherein said attaching said semiconductor die to said substrate is by direct chip attachment.

30. The method of claim 26, further comprising singulating said prepackage to form said package.

31. The method of claim 26, further comprising forming a substantially dome-shaped heat sink comprising a flat top portion and a plurality of straight side portions.