Devices containing platinum-iridium films and methods of preparing such films and devices

• US 20040048467A1
• Filed: 08/12/2003
• Published: 03/11/2004
• Est. Priority Date: 08/31/2000
• Status: Active Grant

• Current Assignee: Micron Technology, Inc.
• Original Assignee: Micron Technology, Inc.
• Inventors: Marsh, Eugene P.
• Granted Patent: US 6,900,107 B2
• Time in Patent Office: Days
• US Class Current: 438/680
• CPC Class Codes: C23C 16/06 characterised by the deposition of metallic material
• CPC Class Codes: C23C 16/18 from metallo-organic compounds
• CPC Class Codes: H01L 21/28556 by chemical means, e.g. CVD, LPCVD, PECVD, laser CVD H01L21/28518 - H01L21/28537 and H01L21/28568 take precedence
• CPC Class Codes: H01L 21/76843 formed in openings in a dielectric
• CPC Class Codes: H01L 21/76864 Thermal treatment
• CPC Class Codes: H01L 21/7687 Thin films associated with contacts of capacitors
• CPC Class Codes: H01L 21/76897 Formation of self-aligned vias or contact plugs, i.e. involving a lithographically uncritical step self-aligned silicidation on field effect transistors H01L29/665
• CPC Class Codes: H01L 28/65 comprising a noble metal or a noble metal oxide, e.g. platinum (Pt), ruthenium (Ru), ruthenium dioxide (RuO2), iridium (Ir), iridium dioxide (IrO2)

Abstract

Methods for forming platinum-iridium films, particularly in the manufacture of a semiconductor device, and devices (e.g., capacitors, integrated circuit devices, and memory cells) containing such films.

Claims

1. A method of manufacturing a semiconductor structure, the method comprising:

providing a semiconductor substrate or substrate assembly;

providing a precursor composition comprising one or more complexes of the formula;

L_yIrY_z,

wherein;

each L group is independently a neutral or anionic ligand;

each Y group is independently a pi bonding ligand selected from the group of CO, NO, CN, CS, N₂, PX₃, PR₃, P(OR)₃, AsX₃, AsR₃, As(OR)₃, SbX₃, SbR₃, Sb(OR)₃, NH_xR<sub>3−

x</sub>, CNR, and RCN, wherein R is an organic group, X is a halide, and x=0 to 3;

y=1 to 4; and

z=1 to 4;

providing a precursor composition comprising one or more platinum complexes; and

forming a platinum-iridium-containing film from the precursor compositions on a surface of the semiconductor substrate or substrate assembly, wherein the platinum-iridium-containing film has the formula platinum(x);

iridium(1−

x), wherein x is in the range of about about 0.99 to about 0.01.

2. The method of claim 1 wherein forming a platinum-iridium-containing film comprises vaporizing the precursor compositions and directing them toward the semiconductor substrate or substrate assembly using a chemical vapor deposition technique.

3. The method of claim 1 wherein the precursor composition comprising one or more complexes of the formula L_yIrY_z is the same as the precursor composition comprising one or more platinum complexes.

4. The method of claim 1 wherein the semiconductor substrate is a silicon wafer or a gallium arsenide wafer.

5. The method of claim 1 wherein each R group is a C₁-C₈ organic group.

6. The method of claim 5 wherein each R group is a C₁-C₅ organic group.

7. The method of claim 6 wherein each R group is a C₁-C₄ alkyl moiety.

8. The method of claim 1 wherein the precursor compositions are each liquids.

9. The method of claim 8 wherein the liquid precursor compositions comprise a solid dissolved in a solvent.

10. The method of claim 1 wherein the precursor compositions are vaporized in the presence of a carrier gas.

11. The method of claim 1 wherein the precursor compositions are vaporized in the presence of a reaction gas.

12. The method of claim 11 wherein the platinum precursor composition comprises a platinum complex selected from the group consisting of CpPt(Me)₃, wherein Me is a methyl group and Cp is substituted or unsubstituted cyclopentadienyl, Pt(CO)₂Cl₂, cis-Pt(CH₃)₂[(CH₃)NC]₂, (COD)Pt(CH₃)₂, (COD)Pt(CH₃)Cl, (C₅H₅)Pt(CH₃)(CO), (acac)(Pt)(CH₃)₃, Pt(acac)₂, Pt(PF₃)₄, wherein COD=1,5 cycloctadiene and acac=acetylacetonate, and mixtures thereof.

13. The method of claim 1 wherein x is in the range of about 0.65 to about 0.85.

14. The method of claim 13 wherein x is about 0.75.

15. A method of forming a film on a substrate, the method comprising:

providing a substrate;

providing a precursor composition comprising one or more complexes of the formula;

L_yIrY_z,

wherein;

each L group is independently a neutral or anionic ligand;

each Y group is independently a pi bonding ligand selected from the group of CO, NO, CN, CS, N₂, PX₃, PR₃, P(OR)₃, AsX₃, AsR₃, As(OR)₃, SbX₃, SbR₃, Sb(OR)₃, NH_xR<sub>3−

x</sub>, CNR, and RCN, wherein R is an organic group, X is a halide, and x=0 to 3;

y=1 to 4; and

z=1 to 4;

providing a precursor composition comprising one or more platinum complexes; and

forming a platinum-iridium-containing film from the precursor compositions on a surface of the substrate, wherein the platinum-iridium-containing film has the formula platinum(x);

iridium(1−

x), wherein x is in the range of about about 0.99 to about 0.01.

16. The method of claim 15 wherein forming a platinum-iridium-containing film comprises vaporizing the precursor compositions and directing them toward the substrate using a chemical vapor deposition technique.

17. The method of claim 16 wherein the platinum precursor composition comprises a platinum complex selected from the group consisting of CpPt(Me)₃, wherein Me is a methyl group and Cp is substituted or unsubstituted cyclopentadienyl, Pt(CO)₂Cl₂, cis-Pt(CH₃)₂[(CH₃)NC]₂, (COD)Pt(CH₃)₂, (COD)Pt(CH₃)Cl, (C₅H₅)Pt(CH₃)(CO), (acac)(Pt)(CH₃)₃, Pt(acac)₂, Pt(PF₃)₄, wherein COD=1,5 cycloctadiene and acac=acetylacetonate, and mixtures thereof

18. The method of claim 15 wherein x is in the range of about 0.65 to about 0.85.

19. The method of claim 18 wherein x is about 0.75.

20. A capacitor comprising:

a first conductive layer;

a dielectric material on at least a portion of the first conductive layer; and

a second conductive layer on the dielectric material;

wherein at least one of the first and second layers comprises a vapor-deposited platinum-iridium film.

21. The capacitor of claim 20 wherein the vapor-deposited platinum-iridium film has the formula platinum(x):

iridium(1−

x), wherein x is in the range of about 0.99 to about 0.01.

22. The capacitor of claim 21 wherein x is in the range of about 0.65 to about 0.85.

23. The capacitor of claim 22 wherein x is about 0.75.

24. The capacitor of claim 21 wherein the dielectric layer is selected from the group consisting of tantalum pentoxide, Barium Strontium Titanate, Strontium Titanate, Lead Zirconium Titanate, Strontium Bismuth Tantalate, and Bismuth Zirconium Titanate.

25. A capacitor comprising:

a first conductive layer;

a dielectric material on at least a portion of the first conductive layer; and

a second conductive layer on the dielectric material; and

a conductive barrier layer comprising a vapor-deposited platinum-iridium film.

26. The capacitor of claim 25 wherein the first conductive layer forms an electrode and is interposed between the dielectric material and the barrier layer.

27. The capacitor of claim 26 wherein the barrier layer is interposed between the dielectric material and the first conductive layer.

28. The capacitor of claim 25 wherein the vapor-deposited platinum-iridium film has the formula platinum(x):

iridium(1−

x), wherein x is in the range of about 0.99 to about 0.01.

29. The capacitor of claim 28 wherein x is in the range of about 0.65 to about 0.85.

30. The capacitor of claim 29 wherein x is about 0.75.

31. An integrated circuit comprising a capacitor, wherein the capacitor comprises:

a first conductive layer;

a dielectric material on at least a portion of the first conductive layer; and

a second conductive layer on the dielectric material;

wherein at least one of the first and second conductive layers comprises a vapor-deposited platinum-iridium film.

32. The integrated circuit of claim 31 wherein the vapor-deposited platinum-iridium film has the formula platinum(x):

iridium(1−

x), wherein x is in the range of about 0.99 to about 0.01.

33. The integrated circuit of claim 32 wherein x is in the range of about 0.65 to about 0.85.

34. The integrated circuit of claim 33 wherein x is about 0.75.

35. The integrated circuit of claim 31 wherein the dielectric layer is selected from the group consisting of tantalum pentoxide, Barium Strontium Titanate, Strontium Titanate, Lead Zirconium Titanate, Strontium Bismuth Tantalate, and Bismuth Zirconium Titanate.

36. An integrated circuit comprising a capacitor, wherein the capacitor comprises:

a first conductive layer;

a dielectric material on at least a portion of the first conductive layer;

a second conductive layer on the dielectric material; and

a conductive barrier layer comprising a vapor-deposited platinum-iridium film.

37. The integrated circuit of claim 36 wherein the first conductive layer forms an electrode and is interposed between the dielectric material and the barrier layer.

38. The integrated circuit of claim 36 wherein the barrier layer is interposed between the dielectric material and the first conductive layer.

39. The integrated circuit of claim 36 wherein the vapor-deposited platinum-iridium film has the formula platinum(x):

iridium(1−

x), wherein x is in the range of about 0.99 to about 0.01.

40. The integrated circuit of claim 39 wherein x is in the range of about 0.65 to about 0.85.

41. The integrated circuit of claim 40 wherein x is about 0.75.

42. A memory cell comprising a transistor and a capacitor comprising a barrier layer comprising a vapor-deposited platinum-iridium film.

43. The memory cell of claim 42 wherein the capacitor comprises:

a first conductive layer;

a dielectric material on at least a portion of the first conductive layer;

a second conductive layer on the dielectric material; and

a barrier layer comprising a vapor-deposited platinum-iridium film.

44. The memory cell of claim 43 wherein the capacitor comprises:

a first conductive layer;

a dielectric material on at least a portion of the first conductive layer; and

a second conductive layer on the dielectric material;

wherein at least one of the first and second layers comprises a vapor-deposited platinum-iridium film.

45. The memory cell of claim 43 wherein the vapor-deposited platinum-iridium film has the formula platinum(x):

iridium(1−

x), wherein x is in the range of about 0.99 to about 0.01.

46. The memory cell of claim 45 wherein x is in the range of about 0.65 to about 0.85.

47. The memory cell of claim 46 wherein x is about 0.75.

48. A method for fabricating a capacitor comprising:

forming a first conductive layer;

forming a dielectric layer on at least a portion of the first conductive layer; and

forming a second conductive layer on the dielectric layer;

wherein at least one of the first and second conductive layers comprises a vapor-deposited platinum-iridium film.

49. The method of claim 48 wherein the vapor-deposited platinum-iridium film has the formula platinum(x):

iridium(1−

x), wherein x is in the range of about 0.99 to about 0.01.

50. The method of claim 49 wherein x is in the range of about 0.65 to about 0.85.

51. The method of claim 50 wherein x is about 0.75.

52. The method of claim 48 wherein the conductive barrier layer is formed by chemical vapor co-deposition of platinum and iridium precursor compositions.

53. The method of claim 48 wherein the platinum precursor composition comprises a platinum complex selected from the group consisting of CpPt(Me)₃, wherein Me is a methyl group and Cp is substituted or unsubstituted cyclopentadienyl, Pt(CO)₂Cl₂, cis-Pt(CH₃)₂[(CH₃)NC]₂, (COD)Pt(CH₃)₂, (COD)Pt(CH₃)Cl, (C₅H₅)Pt(CH₃)(CO), (acac)(Pt)(CH₃)₃, Pt(acac)₂, Pt(P)F₃)₄, wherein COD=1,5 cycloctadiene and acac=acetylacetonate, and mixtures thereof.

54. The method of claim 53 wherein the platinum precursor composition comprises CpPt(Me)₃, wherein Me is a methyl group and Cp is methyl cyclopentadienyl.

55. The method of claim 48 wherein the iridium precursor composition comprises one or more complexes of the formula:

L_yIrY_x,

wherein;

each L group is independently a neutral or anionic ligand;

each Y group is independently a pi bonding ligand selected from the group of CO, NO, CN, CS, N₂, PX₃, PR₃, P(OR)₃, AsX₃, AsR₃, As(OR)₃, SbX₃, SbR₃, Sb(OR)₃, NH_xR<sub>3−

x</sub>, CNR, and RCN, wherein R is an organic group, X is a halide, and x=0 to 3;

y=1 to 4; and

z=1 to 4.

56. The method of claim 48 wherein the chemical vapor co-deposition is conducted by depositing a ratio of platinum to iridium in the range of about 0.99 to about 0.01.

57. The method of claim 56 wherein x is in the range of about 0.65 to about 0.85.

58. The method of claim 57 wherein x is about 0.75.

59. A method for fabricating a capacitor comprising:

forming a first conductive layer;

forming a dielectric layer on at least a portion of the first conductive layer;

forming a second conductive layer on the dielectric layer; and

forming a conductive barrier layer comprising a vapor-deposited platinum-iridium film.

60. The method of claim 59 wherein the first conductive layer is interposed between the barrier layer and the dielectric layer.

61. The method of claim 59 wherein the second conductive layer is interposed between the barrier layer and the dielectric layer.

62. The method of claim 59 wherein the vapor-deposited platinum-iridium film has the formula platinum(x):

iridium(1−

x), wherein x is in the range of about about 0.99 to about 0.01.

63. The method of claim 62 wherein x is in the range of about 0.65 to about 0.85.

64. The method of claim 63 wherein x is about 0.75.

65. The method of claim 59 wherein the conductive barrier layer is formed by chemical vapor co-deposition of platinum and iridium precursor compositions.

66. The method of claim 59 wherein the platinum precursor composition comprises a platinum complex selected from the group consisting of CpPt(Me)₃, wherein Me is a methyl group and Cp is substituted or unsubstituted cyclopentadienyl, Pt(CO)₂Cl₂, cis-Pt(CH₃)₂[(CH₃)NC]₂, (COD)Pt(CH₃)₂, (COD)Pt(CH₃)Cl, (C₅H₅)Pt(CH₃)(CO), (acac)(Pt)(CH₃)₃, Pt(acac)₂, Pt(PF₃)₄, wherein COD=1,5 cycloctadiene and acac=acetylacetonate, and mixtures thereof.

67. The method of claim 66 wherein the platinum precursor composition comprises CpPt(Me)₃, wherein Me is a methyl group and Cp is methyl cyclopentadienyl.

68. The method of claim 59 wherein the iridium precursor composition comprises one or more complexes of the formula:

L_yIrY_x,

wherein;

each L group is independently a neutral or anionic ligand;

each Y group is independently a pi bonding ligand selected from the group of CO, NO, CN, CS, N₂, PX₃, PR₃, P(OR)₃, AsX₃, AsR₃, As(OR)₃, SbX₃, SbR₃, Sb(OR)₃, NH_xR<sub>3−

x</sub>, CNR, and RCN, wherein R is an organic group, X is a halide, and x=0 to 3;

y=1 to 4; and

z=1 to 4.

69. The method of claim 59 wherein the chemical vapor co-deposition is conducted by depositing a ratio of platinum to iridium in the range of about 0.99 to about 0.01.

70. The method of claim 69 wherein x is in the range of about 0.65 to about 0.85.

71. The method of claim 70 wherein x is about 0.75.

72. A method for fabricating a capacitor having a first and a second electrode, the method comprising:

providing a substrate;

forming an insulative layer overlying a substrate;

forming an opening in the insulative layer to expose the substrate;

forming a conductive plug in the opening, the conductive plug forming a first portion of the first electrode of the capacitor, the conductive plug recessed below a surface of the insulative layer;

forming a first conductive layer in the opening and overlying the conductive plug such that the first conductive layer is surrounded on sidewalls by the insulative layer, the first conductive layer forming a second portion of the first electrode, the first conductive layer being formed of a vapor-deposited platinum-iridium film; and

forming a second conductive layer overlying the first conductive layer, the second conductive layer forming a third portion of the first electrode.

73. The method of claim 72 further comprising:

creating a dielectric layer on the second conductive layer, the first conductive layer substantially preventing oxidation of the dielectric layer; and

creating the second electrode overlying the dielectric layer, the first and the second electrode and the dielectric layer forming the capacitor.

74. The method of claim 72 wherein forming the second electrode comprises sputtering an electrically conductive material to overly the dielectric layer.

75. The method of claim 72 wherein forming the first conductive layer comprises:

admitting a platinum precursor composition to a chemical vapor deposition reaction chamber;

admitting an iridium precursor composition to the chemical vapor deposition reaction chamber; and

applying sufficient reaction gas to the chemical vapor deposition reaction chamber to cause co-deposition of platinum and iridium.

76. The method of claim 72 further comprising planarizing the insulative layer prior to form the conductive plug.

77. The method of claim 72 wherein forming the conductive plug comprises depositing in-situ doped polysilicon in the opening.

78. The method of claim 72 wherein the chemical vapor co-deposition is conducted by depositing a ratio of platinum to iridium in the range of about 0.99 to about 0.01.

79. The method of claim 78 wherein x is in the range of about 0.65 to about 0.85.

80. The method of claim 79 wherein x is about 0.75.