Electronic circuit

• US 20040051102A1
• Filed: 08/15/2003
• Published: 03/18/2004
• Est. Priority Date: 12/09/1992
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Miyazaki, Minoru, Murakami, Akane, Cui, Baochun, Yamamoto, Mutsuo
• Granted Patent: US 7,061,016 B2
• Time in Patent Office: Days
• US Class Current: 257/72
• CPC Class Codes: G02F 1/1368 in which the switching element is a three-electrode device G02F1/136277 takes precedence
• CPC Class Codes: H01L 2224/45124 Aluminium (Al) as principal constituent
• CPC Class Codes: H01L 2224/48 of an individual wire connector
• CPC Class Codes: H01L 23/53223 Additional layers associated with aluminium layers, e.g. adhesion, barrier, cladding layers
• CPC Class Codes: H01L 27/12 the substrate being other than a semiconductor body, e.g. an insulating body
• CPC Class Codes: H01L 27/124 with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits wiring structures per se H01L23/52
• CPC Class Codes: H01L 29/458 for thin film silicon, e.g. source or drain electrode
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00014 the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/10253 Silicon [Si]
• CPC Class Codes: H01L 2924/13091 Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]

Abstract

An electronic circuit formed on an insulating substrate and having thin-film transistors (TFTs) comprising semiconductor layers. The thickness of the semiconductor layers is less than 1500 Å, e.g., between 100 and 750 Å. A first layer consisting mainly of titanium and nitrogen is formed on the semiconductor layer. A second layer consisting aluminum is formed on top of the first layer. The first and second layers are patterned into conductive interconnects. The bottom surface of the second layer is substantially totally in intimate contact with the first layer. The interconnects have good contacts with the semiconductor layer.

Claims

1. A display device comprising:

a thin film transistor over a substrate, the thin film transistor comprising a source and a drain regions; and

a pixel electrode comprising a conductive oxide film electrically connected to one of the source region and the drain region through an electrode, the electrode comprising a first layer in contact with the one of the source region and the drain region, a second layer formed on the first layer, and a third layer formed on the second layer,

wherein the first layer has a barrier characteristics, the second layer comprises aluminum, and the third layer has a barrier characteristics.

2. A display device according to claim 1 wherein the source region and the drain region comprise crystalline silicon.

3. A display device according to claim 1 wherein the first layer comprises titanium nitride.

4. A display device according to claim 1 wherein the second layer comprises aluminum containing 1% silicon.

5. A display device according to claim 1 wherein the third layer comprises titanium nitride.

6. A display device according to claim 1 wherein the second layer has a thickness of 2000 Å

or more.

7. A display device according to claim 1 wherein the thin film transistor is a top gate type thin film transistor.

8. A display device according to claim 1 wherein the display device is an active matrix type liquid crystal display device.

9. A display device comprising:

a thin film transistor over a substrate, the thin film transistor comprising a source and a drain regions; and

drain regions; and

a pixel electrode comprising indium tin oxide electrically connected to one of the source region and the drain region through an electrode, the electrode comprising a first layer in contact with the one of the source region and the drain region, a second layer formed on the first layer, and a third layer formed on the second layer,

wherein the first layer has a barrier characteristics, the second layer comprises aluminum, and the third layer has a barrier characteristics.

10. A display device according to claim 9 wherein the source region and the drain region comprise crystalline silicon.

11. A display device according to claim 9 wherein the first layer comprises titanium nitride.

12. A display device according to claim 9 wherein the second layer comprises aluminum containing 1% silicon.

13. A display device according to claim 9 wherein the third layer comprises titanium nitride.

14. A display device according to claim 9 wherein the second layer has a thickness of 2000 Å

or more.

15. A display device according to claim 9 wherein the thin film transistor is a top gate type thin film transistor.

16. A display device according to claim 9 wherein the display device is an active matrix type liquid crystal display device.

17. A display device comprising:

a thin film transistor over a substrate, the thin film transistor comprising a source and a drain regions; and

a pixel electrode comprising a conductive oxide film electrically connected to one of the source region and the drain region through an electrode, the electrode comprising a first layer in contact with the one of the source region and the drain region, a second layer formed on the first layer, and a third layer formed on the second layer,

wherein the first layer has a barrier characteristics, the second layer comprises aluminum having a thickness of 5000 Å

or less, and the third layer has a barrier characteristics.

18. A display device according to claim 17 wherein the source region and the drain region comprise crystalline silicon.

19. A display device according to claim 17 wherein the first layer comprises titanium nitride.

20. A display device according to claim 17 wherein the second layer comprises aluminum containing 1% silicon.

21. A display device according to claim 17 wherein the third layer comprises titanium nitride.

22. A display device according to claim 17 wherein the second layer has a thickness of 2000 Å

or more.

23. A display device according to claim 17 wherein the thin film transistor is a top gate type thin film transistor.

24. A display device according to claim 17 wherein the display device is an active matrix type liquid crystal display device.

25. A display device comprising:

a thin film transistor over a substrate, the thin film transistor comprising a source and a drain regions; and

a pixel electrode comprising indium tin oxide electrically connected to one of the source region and the drain region through an electrode, the electrode comprising a first layer in contact with the one of the source region and the drain region, a second layer formed on the first layer, and a third layer formed on the second layer,

wherein the first layer has a barrier characteristics, the second layer comprises aluminum having a thickness of 5000 Å

or less, and the third layer has a barrier characteristics.

26. A display device according to claim 25 wherein the source region and the drain region comprise crystalline silicon.

27. A display device according to claim 25 wherein the first layer comprises titanium nitride.

28. A display device according to claim 25 wherein the second layer comprises aluminum containing 1% silicon.

29. A display device according to claim 25 wherein the third layer comprises titanium nitride.

30. A display device according to claim 25 wherein the second layer has a thickness of 2000 Å

or more.

31. A display device according to claim 25 wherein the thin film transistor is a top gate type thin film transistor.

32. A display device according to claim 25 wherein the display device is an active matrix type liquid crystal display device.

33. A display device comprising:

a thin film transistor over a substrate, the thin film transistor comprising a source and a drain regions; and

a pixel electrode comprising a conductive oxide film electrically connected to one of the source region and the drain region through an electrode, the electrode comprising a first layer in contact with the one of the source region and the drain region, a second layer formed on the first layer, and a third layer formed on the second layer,

wherein the pixel electrode is in contact with an upper surface of the third layer, and

wherein the first layer has a barrier characteristics, the second layer comprises aluminum, and the third layer has a barrier characteristics.

34. A display device according to claim 33 wherein the source region and the drain region comprise crystalline silicon.

35. A display device according to claim 33 wherein the first layer comprises titanium nitride.

36. A display device according to claim 33 wherein the second layer comprises aluminum containing 1% silicon.

37. A display device according to claim 33 wherein the third layer comprises titanium nitride.

38. A display device according to claim 33 wherein the second layer has a thickness of 2000 Å

or more.

39. A display device according to claim 33 wherein the thin film transistor is a top gate type thin film transistor.

40. A display device according to claim 33 wherein the display device is an active matrix type liquid crystal display device.

41. A display device comprising:

a thin film transistor over a substrate, the thin film transistor comprising a source and a drain regions; and

a pixel electrode comprising indium tin oxide electrically connected to one of the source region and the drain region through an electrode, the electrode comprising a first layer in contact with the one of the source region and the drain region, a second layer formed on the first layer, and a third layer formed on the second layer,

wherein the pixel electrode is in contact with an upper surface of the third layer, and

wherein the first layer has a barrier characteristics, the second layer comprises aluminum, and the third layer has a barrier characteristics.

42. A display device according to claim 41 wherein the source region and the drain region comprise crystalline silicon.

43. A display device according to claim 41 wherein the first layer comprises titanium nitride.

44. A display device according to claim 41 wherein the second layer comprises aluminum containing 1% silicon.

45. A display device according to claim 41 wherein the third layer comprises titanium nitride.

46. A display device according to claim 41 wherein the second layer has a thickness of 2000 Å

or more.

47. A display device according to claim 41 wherein the thin film transistor is a top gate type thin film transistor.

48. A display device according to claim 41 wherein the display device is an active matrix type liquid crystal display device.