Semiconductor device of reduced gate overlap capacitance and method of manufacturing the semiconductor device
First Claim
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1. A semiconductor device including an MOS transistor having:
- a semiconductor substrate;
a gate insulating film selectively disposed on said semiconductor substrate;
a gate electrode selectively disposed on said gate insulating film; and
a spacer insulating film disposed on the side surface of said gate electrode, wherein said gate insulating film includes a first part corresponding to the central portion of a lower part of said gate electrode and a second part corresponding to the edge portion of the lower part of said gate electrode, said second part has a contoured shape widening vertically so as to increase its thickness from a portion for engagement with said first part, a contoured shape in the state that said spacer insulating film engages said second part of said gate insulating film is in a continuous form of at least an inclination having a first angle corresponding to a tilt angle of a side lower part of said gate electrode and an inclination having a second angle with respect to a main surface of said semiconductor substrate on the upper side of said second part of said gate insulating film, and said first angle is greater than said second angle.
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Abstract
Provided is an MOS transistor capable of reducing gate overlap capacitance without decreasing the driving current of the MOS transistor. Specifically, a double-angle smile oxidation structure is obtainable by curving the side surface of a gate electrode (22) so as to widen upwardly, and thickening the edge portion of a gate oxide film (21) by re-oxidation. The impurity concentration of a source/drain layer under the double-angle smile oxidation structure (a region around point B) is set to the range of 4×1018 cm−3±40%.
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10 Claims
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1. A semiconductor device including an MOS transistor having:
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a semiconductor substrate;
a gate insulating film selectively disposed on said semiconductor substrate;
a gate electrode selectively disposed on said gate insulating film; and
a spacer insulating film disposed on the side surface of said gate electrode, wherein said gate insulating film includes a first part corresponding to the central portion of a lower part of said gate electrode and a second part corresponding to the edge portion of the lower part of said gate electrode, said second part has a contoured shape widening vertically so as to increase its thickness from a portion for engagement with said first part, a contoured shape in the state that said spacer insulating film engages said second part of said gate insulating film is in a continuous form of at least an inclination having a first angle corresponding to a tilt angle of a side lower part of said gate electrode and an inclination having a second angle with respect to a main surface of said semiconductor substrate on the upper side of said second part of said gate insulating film, and said first angle is greater than said second angle. - View Dependent Claims (2, 3, 4, 5)
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6. A semiconductor device including an MOS transistor having:
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a semiconductor substrate;
a gate insulating film selectively disposed on said semiconductor substrate;
a gate electrode selectively disposed on said gate insulating film; and
a spacer insulating film disposed on the side surface of said gate electrode, wherein said gate insulating film includes a first part corresponding to the central portion of a lower part of said gate electrode and a second part corresponding to the edge portion of the lower part of said gate electrode, said second part has a contoured shape widening upwardly so as to increase its thickness from a portion for engagement with said first part and also curving so as to project outwardly. - View Dependent Claims (7, 8, 9, 10)
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Specification