×

TEST STRUCTURES FOR ON-CHIP REAL-TIME RELIABILITY TESTING

  • US 20040051553A1
  • Filed: 09/13/2002
  • Published: 03/18/2004
  • Est. Priority Date: 09/13/2002
  • Status: Active Grant
First Claim
Patent Images

1. A method for indicating end-of-lifetime in an integrated circuit comprising:

  • predicting hot carrier injection failure;

    predicting gate oxide TDDB failure;

    predicting electromigration failure; and

    indicating when either of said hot carrier injection failure, said gate oxide TDDB failure, or said electromigration failure occurs.

View all claims
  • 1 Assignment
Timeline View
Assignment View
    ×
    ×