PIXEL STRUCTURE OF THIN-FILM TRANSISTOR LIQUID CRYSTAL DISPLAY

• US 20040051821A1
• Filed: 04/08/2003
• Published: 03/18/2004
• Est. Priority Date: 09/13/2002
• Status: Active Grant

• Current Assignee: InnoLux Corporation
• Original Assignee: Toppoly Optoelectronics Corporation (InnoLux Corporation)
• Inventors: Cheng, Hsin-An, Chiu, Chaung-Ming
• Granted Patent: US 6,791,631 B2
• Time in Patent Office: Days
• US Class Current: 349/43
• CPC Class Codes: G02F 1/136209 Light shielding layers, e.g. black matrix, incorporated in the active matrix substrate, e.g. structurally associated with the switching element
• CPC Class Codes: G02F 1/136213 Storage capacitors associated with the pixel electrode
• CPC Class Codes: G02F 2202/104 poly-Si

Abstract

A pixel structure of a thin-film transistor liquid crystal display. A storage capacitor is formed by simultaneously defining a doped polysilicon layer, a dielectric layer and shielding metal layer and a source/drain region of a low-temperature polysilicon thin-film transistor. The shielding metal layer is formed on the doped polysilicon layer and is electrically connected to a pixel electrode. As the area occupied by the shielding metal layer is the area of the storage capacitor, the aperture ratio is greatly enhanced.

Claims

1. A pixel structure of a thin-film transistor liquid crystal display, suitable to be formed on a transparent substrate, the pixel structure comprising:

a pixel, formed on the transparent substrate, the pixel having a low-temperature polysilicon thin-film transistor and a pixel electrode, wherein the low-temperature polysilicon thin-film transistor comprises a gate and a source/drain region having one side electrically connected to the pixel electrode;

a scan line, formed on the transparent substrate and electrically connected to the gate;

a signal line, formed on the transparent substrate and electrically to the other side of the source/drain region; and

a storage capacitor, formed underneath the signal line, the storage capacitor having a doped polysilicon layer, a dielectric layer and a shielding metal layer, wherein the shielding metal layer is formed on the doped polysilicon layer and is electrically connected to the pixel electrode.

2. The pixel structure according to claim 1, wherein the source/drain region includes a polysilicon layer doped with N-type dopants.

3. The pixel structure according to claim 1, wherein the source/drain region includes a polysilicon layer doped with P-type dopants.

4. The pixel structure according to claim 1, wherein the doped polysilicon layer includes an N-type doped polysilicon layer.

5. The pixel structure according to claim 1, wherein the doped polysilicon layer includes a P-type doped polysilicon layer.

6. The pixel structure according to claim 1, wherein the doped polysilicon layer is connected to a DC voltage.

7. The pixel structure according to claim 1, wherein the doped polysilicon layer is connected to an AC voltage.

8. The pixel structure according to claim 1, wherein the shielding metal layer is made of a material selected from a group consisting molybdenum-tungsten alloy, chromium, and molybdenum.

9. The pixel structure according to claim 1, wherein the doped polysilicon layer has an opening aligned under the signal line.

10. A thin-film transistor array substrate, comprising a plurality of pixel structures as claimed in claim 1.

11. A thin-film transistor liquid crystal display, comprising the thin-film transistor array substrate as claimed in claim 10, a color filter substrate and a liquid crystal layer, wherein the liquid crystal layer is disposed between the thin-film transistor array substrate and the color filter substrate.