Process for transferring a layer of strained semiconductor material

• US 20040053477A1
• Filed: 07/09/2003
• Published: 03/18/2004
• Est. Priority Date: 07/09/2002
• Status: Active Grant

• Current Assignee: Soitec Silicon On Insulator Technologies SA (Soitec S.A.)
• Original Assignee: Soitec Silicon On Insulator Technologies SA (Soitec S.A.)
• Inventors: Bensahel, Daniel, Ghyselen, Bruno, Skotnicki, Thomas
• Granted Patent: US 6,953,736 B2
• Time in Patent Office: Days
• US Class Current: 438/465
• CPC Class Codes: H01L 21/76254 with separation/delamination along an ion implanted layer, e.g. Smart-cut, Unibond
• CPC Class Codes: H01L 21/76259 with separation/delamination along a porous layer
• CPC Class Codes: H01L 29/1054 with a variation of the composition, e.g. channel with strained layer for increasing the mobility
• CPC Class Codes: Y10S 438/938 Lattice strain control or utilization

Abstract

The invention relates to a process for producing an electronic structure that includes a thin layer of strained semiconductor material from a donor wafer. The donor wafer has a lattice parameter matching layer that includes an upper layer of a semiconductor material having a first lattice parameter and a film of semiconductor material having a second, nominal, lattice parameter that is substantially different from the first lattice parameter and that is strained by the matching layer. This process includes transfer of the film to a receiving substrate. The invention also relates to the semiconductor structures that can be produced by the process.

Claims

1. A method of preparing a semiconductor wafer, which comprises:

creating a region of weakness in a matching substrate that comprises a matching layer with a first lattice parameter on a first surface, wherein the region of weakness is configured to facilitate splitting;

growing on the first surface of the matching layer a first strained layer of a first semiconductor material in a strained state to impart the same first lattice parameter in the first strained layer as in the matching layer;

associating a receiving substrate with the first strained layer to form a composite structure; and

obtaining a product wafer and a donor wafer by splitting the composite structure at the region of weakness, wherein the product wafer includes the strained first layer and the receiving substrate, while the donor wafer includes at least a portion of the matching layer.

2. The method of claim 1, wherein the matching substrate comprises the matching layer on a handling substrate that has a second lattice parameter that is different from the first lattice parameter.

3. The method of claim 1, wherein the matching layer includes a buffer layer and a relaxed surface layer on which the first strained layer is grown.

4. The method of claim 3, wherein the lattice parameter of the buffer layer is graded between the first and second lattice parameters.

5. The method of claim 1, wherein the region of weakness is created by implanting atomic species.

6. The method of claim 1, wherein the region of weakness is created by adding a porous layer.

7. The method of claim 1, wherein the lattice parameter of the first material when strained is different than the lattice parameter of the first material in a relaxed state.

8. The method of claim 1, wherein the receiving substrate is bonded to the first strained layer.

9. The method of claim 1, wherein the first strained layer is disposed directly adjacent an insulator on a side of the first strained layer on which the receiving substrate is disposed.

10. The method of claim 1, further comprising retaining a portion of the matching layer on the first strained layer after splitting.

11. The method of claim 10, further comprising removing the retained portion of the matching layer from the first strained layer.

12. The method of claim 10, further comprising selectively etching the retained portion of the matching layer from the first strained layer.

13. The method of claim 12, further comprising smoothing roughness from the retained portion of the matching layer.

14. The method of claim 1, wherein the first strained layer comprises silicon, and the matching layer comprises silicon germanium.

15. The method of claim 1, wherein the region of weakness is formed after the growing the first strained layer.

16. The method of claim 1, wherein the first strained layer is strained for modifying the energy band structure of the semiconductor material of that layer for improving the electrical properties thereof compared to the semiconductor material in a relaxed state.

17. The method of claim 16, wherein the first strained layer has a thickness that is less than the critical thickness thereof for preventing substantial relaxation of strain.

18. The method of claim 17, wherein first strained layer has a thickness of less than about 20 nanometers prior to the splitting.

19. The method of claim 16, wherein the first strained layer has a charge carrier mobility that is at least about 50% higher than in the semiconductor material in a relaxed state.

20. The method of claim 1, further comprising providing a first strain-retaining layer on the first strained layer for maintaining strain from the side of the first strained layer opposite the matching layer.

21. The method of claim 20, wherein the first strain-retaining layer has the first lattice parameter.

22. The method of claim 21, wherein the matching and first strain-retaining layers are made of substantially the same material.

23. The method of claim 20, growing a second strained layer of semiconductor material on the first strain-retaining layer to impart the first lattice parameter therein.

24. The method of claim 23, further comprising providing a second strain-retaining layer on the second strained layer and having the first lattice parameter for maintaining the strained state of the second strained layer from the side of the second strained layer opposite the first strain-retaining layer.

25. The method of claim 23, further comprising:

providing a region of weakness in the first strain-retaining layer;

transferring the first strained layer to a first receiving substrate by splitting at the region of weakness in the first strain-retaining layer; and

transferring the second strained layer to a second receiving substrate by splitting in the region of weakness in the matching layer.

26. The method of claim 20, wherein:

the first strained layer comprises first material; and

the first strain retaining layer comprises an oxide of the first material.

27. The method of claim 20, wherein the first strained layer comprises silicon, and the method further comprising bonding the first strain retaining layer of silica to the silicon of the first strained layer prior to the splitting.

28. The method of claim 27, further comprising thickening the strained layer of silicon epitaxially after the splitting.

29. The method of claim 28, wherein the strained layer is thickened epitaxially after the splitting to a layer thickness of greater than about 40 nm.

30. A method of preparing a semiconductor wafer, comprising:

providing a repeating pattern of first and second layers;

performing multiple transfers of portion of the pattern to receiving substrates to produce product wafers, each portion including at least one of the first layers.

31. The method of claim 30, further comprising:

creating regions of weakness in the second layers to facilitate splitting; and

splitting the pattern at the second layers for transferring the first layers.

32. The method of claim 30, comprising:

providing a matching substrate that has a matching layer with a first lattice parameter on a first surface;

growing on the first surface of the matching layer a first strained layer of a first semiconductor material in a strained state to impart the same first lattice parameter in the first strained layer as in the matching layer;

providing a first strain-retaining layer having the first lattice parameter on the first strained layer for maintaining strain from the side of the first strained layer opposite the matching layer;

growing a second strained layer of semiconductor material on the first strain-retaining layer to impart the first lattice parameter therein;

creating a second region of weakness in the first strain-retaining layer;

associating a second receiving substrate with the strained layers to form a second composite structure; and

obtaining a second product wafer and a second donor wafer by splitting the second composite structure at the second region of weakness, wherein the second product wafer includes the second strained layer and the second receiving substrate, while the second donor wafer includes at least a portion of the first strain-retaining layer;

creating a first region of weakness in the first strain-retaining layer;

associating a first receiving substrate with the first strained layer to form a first composite structure; and

obtaining a first product wafer and a first donor wafer by splitting the first composite structure at the first region of weakness, wherein the first product wafer includes the first strained layer and the first receiving substrate, while the first donor wafer includes at least a portion of the matching layer;

wherein the first layers of the repeating pattern comprise the strained layers, and the second layers of the repeating pattern comprise the strain retaining layers.

33. The method of claim 32, wherein the first region of weakness is created in the second donor wafer.

34. The method of claim 32, further comprising providing a second strain-retaining layer on the second strained layer and having the first lattice parameter for maintaining the strained state of the second strained layer from the side of the second strained layer opposite the first strain-retaining layer.

35. A method of preparing a semiconductor wafer, comprising:

growing on the first surface of a matching layer a first strained layer of a first semiconductor material in a strained state to impart the same first lattice parameter in the first strained layer as in the matching layer;

associating a receiving substrate with the first strained layer to form a composite structure; and

transferring the first strained layer from the matching layer to the receiving substrate by splitting the matching layer from the strained layer.

36. A semiconductor wafer, comprising:

a substrate having a matching layer with a first lattice parameter;

a first strained layer of a semiconductor material grown on the matching layer and being strained to impart the same first lattice parameter in the first strained layer as in the matching layer; and

a first strain-retaining layer grown on the first strained layer in a substantially relaxed state, and having the same first lattice parameter for maintaining the strained state of the first strained layer from the side of the first strained layer opposite the matching layer.

37. The semiconductor wafer of claim 36, wherein the strain imparted to the first strain layer is sufficient for modifying the energy band structure of the first strained layer material for improving the electrical properties thereof compared to the semiconductor material in a relaxed state.

38. The semiconductor wafer of claim 37, wherein the matching layer and first strain-retaining layer are of substantially the same material.

39. The semiconductor wafer of claim 36, further comprising a second strained layer on the first strain-retaining layer and being strained to impart the first lattice parameter therein.

40. The semiconductor wafer of claim 39, further comprising a second strain-retaining layer on the second strained layer in a substantially relaxed state and having the first lattice parameter for maintaining the strained state of the second strained layer from the side of the second strained layer opposite the first strain-retaining layer.

41. The semiconductor wafer of claim 36, further comprising a region of weakness in the matching substrate configured to facilitate splitting.

42. A semiconductor wafer, comprising a repeating pattern of first and second layers arranged for multiple transfers of the first layers sequentially to different receiving substrates.

43. The semiconductor wafer of claim 42, wherein the first layers comprise strained layers.

44. The semiconductor wafer of claim 42, further comprising a matching substrate that has a matching layer on which one of the first layers at an end of the repeating pattern is grown.