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High-frequency power amplifier

  • US 20040056723A1
  • Filed: 09/05/2003
  • Published: 03/25/2004
  • Est. Priority Date: 09/24/2002
  • Status: Active Grant
First Claim
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1. A high-frequency power amplifier comprising:

  • a first amplifier including a first transistor for performing signal amplification, a first two-terminal network for giving an open-circuit condition or a sufficiently large load at an even-numbered order harmonic frequency of a signal frequency and giving a short-circuiting condition or a sufficiently small load at an odd-numbered order harmonic frequency of the signal frequency, which is provided at an output side of the first transistor, a first input matching circuit for performing impedance matching on the signal frequency, which is provided at an input side of the first transistor and a first output matching circuit for performing impedance matching on the signal frequency, which is provided at the output side of the first transistor;

    a second amplifier including a second transistor for performing signal amplification, a second two-terminal network for giving the short-circuiting condition or the sufficiently small load at the even-numbered order harmonic frequency of the signal frequency and giving the open-circuit condition or the sufficiently large load at the odd-numbered order harmonic frequency of the signal frequency, which is provided at an output side of the second transistor, a second input matching circuit for performing impedance matching on the signal frequency, which is provided at an input side of the second transistor and a second output matching circuit for performing impedance matching on the signal frequency, which is provided at the output side of the second transistor;

    a power distribution circuit for distributing an input signal to the first transistor and the second transistor such that a phase difference between the first transistor and the second transistor reaches about 90 degrees, which is connected between an input of the first amplifier and an input of the second amplifier;

    a distributed line for controlling an output load of the first transistor through impedance transformation based on an operating state of the second transistor, which is connected between an output of the first amplifier and an output of the second amplifier; and

    a bias circuit which is provided for the first transistor and the second transistor.

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