Measurement of lateral diffusion of diffused layers

• US 20040057052A1
• Filed: 09/23/2002
• Published: 03/25/2004
• Est. Priority Date: 09/23/2002
• Status: Active Grant

• Current Assignee: Semiconductor Physics Laboratory, Inc.
• Original Assignee: Applied Materials Incorporated
• Inventors: Borden, Peter G.
• Granted Patent: US 6,963,393 B2
• Time in Patent Office: Days
• US Class Current: 356/445
• CPC Class Codes: G01N 21/1717 with a modulation of one or more physical properties of the sample during the optical investigation, e.g. electro-reflectance
• CPC Class Codes: G01N 21/55 Specular reflectivity
• CPC Class Codes: H01L 22/20 Sequence of activities consisting of a plurality of measurements, corrections, marking or sorting steps
• CPC Class Codes: H01L 22/34 Circuits for electrically characterising or monitoring manufacturing processes, e. g. whole test die, wafers filled with test structures, on-board-devices incorporated on each die, process control monitors or pad structures thereof, devices in scribe line switching, multiplexing, gating devices G01R19/25; process control with lithography, e.g. dose control, G03F7/20; structures for alignment control by optical means G03F7/70633
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Abstract

Any semiconductor wafer fabrication process may be changed to monitor lateral abruptness of doped layers as an additional step in the wafer fabrication process. In one embodiment, a test structure including one or more doped regions is formed in a production wafer (e.g. simultaneously with one or more transistors) and one or more dimension(s) of the test structure are measured, and used as an estimate of lateral abruptness in other doped regions in the wafer, e.g. in the simultaneously formed transistors. Doped regions in test structures can be located at regularly spaced intervals relative to one another, or alternatively may be located with varying spacings between adjacent doped regions. Alternatively or in addition, multiple test structures may be formed in a single wafer, with doped regions at regular spatial intervals in each test structure, while different test structures have different spatial intervals.

Claims

1. A method for evaluating a semiconductor wafer, the method comprising:

forming a test structure of a predetermined geometry in the semiconductor material, said test structure comprising a plurality of areas separated from one another, at least one area in the plurality of areas being either mostly doped or mostly undoped;

measuring light reflected from said test structure, said reflected light having a component from said at least one area;

analyzing a signal obtained from measuring to determine the extent of lateral diffusion in said region; and

using the extent of lateral diffusion to accept or reject the semiconductor wafer for further processing.

2. The method of claim 1 wherein:

said plurality of areas comprises at least a first area that is mostly doped, and a second area that is mostly undoped; and

the method comprises measuring light reflected from said test structure, said reflected light having a component from each of said first area and said second area.

3. The method of claim 1 wherein:

a fraction of doping in said at least one area is known; and

said analyzing includes using said fraction to determine the extend of lateral diffusion.

4. The method of claim 1 further comprising

illuminating at least a portion of the test structure with a first beam to generate a plurality of charge carriers;

illuminating with a second beam to perform said measuring in at least a region of the semiconductor wafer having at least some of the charge carriers in the plurality generated by the first beam.

5. The method of claim 4 wherein:

each of the first beam and the second beam are coincident.

6. The method of claim 4 wherein:

at least one of the first beam and the second beam is polarized.

7. The method of claim 6 wherein:

the test structure includes a plurality of doped regions, each doped region being separated from an adjacent doped region; and

polarization is parallel to each of said doped regions.

8. The method of claim 6 wherein:

each of the first beam and the second beam is polarized.

9. The method of claim 4 further comprising:

modulating intensity of the first beam at a predetermined frequency; and

using the predetermined frequency during said measuring.

10. The method of claim 1 wherein:

each area in said plurality is separated from an adjacent area by a fixed distance.

11. The method of claim 1 wherein:

each area in said plurality is separated from an adjacent area by a different distance.

12. The method of claim 1 wherein:

said measuring indicates linewidth after patterning.

18. The method of claim 11 wherein:

the measurement in addition includes measurement of response in at least one region where the fraction of doping is independently known; and

the doping fraction is used in determining a change in the process parameter.

13. A method for evaluating a semiconductor wafer, the method comprising:

forming a test structure of a predetermined geometry in the semiconductor wafers;

measuring a signal indicative of a dimension of the test structure, said signal originating in at least one of a mostly doped region and a mostly undoped region; and

changing a process parameter used in fabrication of the wafer, depending on said signal obtained from said measuring.

14. The method of claim 13 further comprising:

illuminating the test structure with at least one beam of electromagnetic radiation.

15. The method of claim 14 wherein:

said beam is polarized.

16. The method of claim 13 further comprising:

illuminating the test structure with a first beam to generate a plurality of charge carriers; and

illuminating the test structure with a second beam to sense a concentration of the charge carriers generated by the first beam.

17. The method of claim 16 wherein;

the first beam is modulated at a predetermined frequency; and

said predetermined frequency is used during said act of measuring.

19. An apparatus for evaluating a semiconductor wafer, the apparatus comprising:

means for forming a test structure of a predetermined geometry in the semiconductor wafer; and

means for measuring a signal indicative of dimension of the test structure.

20. The method of claim 19 further comprising:

means for measuring linewidth after patterning.

21. A method for evaluating a semiconductor wafer, the method comprising:

forming a test structure of a striped geometry in the semiconductor material, said test structure comprising a plurality of areas separated from one another, each area having a doping concentration different from an adjacent area;

measuring light reflected from said test structure, said reflected light having a component from at least one area;

analyzing a signal obtained from measuring to determine the extent of lateral diffusion in said region; and

using the extent of lateral diffusion to accept or reject the semiconductor wafer for further processing.