Copy protection for analog video signals from computing devices

• US 20040057698A1
• Filed: 09/19/2002
• Published: 03/25/2004
• Est. Priority Date: 09/19/2002
• Status: Active Grant

• Current Assignee: Hewlett-Packard Development Company, L.P. (HP Inc.)
• Original Assignee: Compaq Information Technologies Group LP (HP Inc.)
• Inventors: Voltz, Christopher D., Frederick, John W.
• Granted Patent: US 7,398,008 B2
• Time in Patent Office: Days
• US Class Current: 386/94
• CPC Class Codes: H04N 2005/91314 the copy protection signal being a pulse signal inserted in blanking intervals of the video signal, e.g. pseudo-AGC pulses, pseudo-sync pulses
• CPC Class Codes: H04N 5/765 Interface circuits between an apparatus for recording and another apparatus
• CPC Class Codes: H04N 5/775 between a recording apparatus and a television receiver
• CPC Class Codes: H04N 5/85 on discs or drums
• CPC Class Codes: H04N 5/913 for scrambling ; for copy protection

Abstract

A copy protection method and apparatus is provided to inhibit unauthorized viewing or copying of a video signal. A varying set of additional or invalid video pulses are generated onto a typical video signal. A pulse sequence identifier identifies the location of the invalid or additional pulses and is likewise generated onto the video signal prior to the occurrence of the identified pulses. The combined signal is received at an authorized display which then decodes or filters the additional or invalid portion of the video signal from the original signal according to a decode protocol stored in local memory. A resultant video output signal is guaranteed from only the original signal.

Claims

1. A method of processing a video signal from a computing device, the video signal including a first plurality of valid video signal pulses, the method comprising the steps of:

generating a first plurality of invalid video signal pulses onto the video signal;

generating a first pulse sequence identifier onto the video signal;

transmitting the video signal to a display device;

decoding the first pulse sequence identifier from the video signal to distinguish the first plurality of valid video signal pulses and the first plurality of invalid video signal pulses; and

generating an output video signal from the video signal based on only the first plurality of valid video signal pulses.

2. The method of claim 1, further comprising the steps of:

generating a second plurality of invalid video signal pulses onto the video signal;

generating a second pulse sequence identifier onto the video signal;

decoding the second pulse sequence identifier from the video signal to distinguish the second plurality of valid video signal pulses from the second plurality of invalid video signal pulses; and

generating an output video signal from the transmitted video signal using only the second plurality of valid video signal pulses.

3. The method of claim 2, further comprising the step of:

decoding the first pulse sequence identifier to determine the location of the second pulse sequence identifier embedded in the video signal.

4. The method of claim 2, wherein the first, second, and subsequent pluralities of invalid video signal pulses and the first, second, and subsequent pulse sequence identifiers are successively generated onto the video signal.

5. The method of claim 1, wherein the first plurality of invalid video signal pulses and the first pulse sequence identifier are generated after generation of a predetermined number of subsequent pulse sequence identifiers.

6. The method of claim 1, wherein the first plurality of invalid signal pulses and the first pulse sequence identifier are generated onto the video signal during a blanking period.

7. The method of claim 1, further comprising the steps of:

polling the display device to determine if the display device includes a decode circuitry to perform the decoding step; and

enabling the decode circuitry to perform the decoding step if the display device includes the decode circuitry.

8. The method of claim 1, further comprising:

polling a video source to determine if the video signal is unprotected; and

disabling the generation of invalid video signals if the video signal is unprotected.

9. The method of claim 1, wherein the valid video signal pulses and the invalid video signal pulses are horizontal sync pulses.

10. The method of claim 1, wherein the valid video signal pulses and the invalid video signal pulses are vertical sync pulses.

11. The method of claim 1, further comprising the steps:

polling the display device to determine if the display device is authorized to display the decoded video signal; and

disabling decoding if the display device is not authorized.

12. A method of processing a video signal from a computing device to inhibit unauthorized viewing or copying of the video signal, the method comprising the steps of:

generating a sequence signal onto the video signal indicating the validity of each pulse on the video signal;

transmitting the video signal;

decoding the sequence signal from the transmitted video signal to determine a valid pulse;

generating a video signal output from the transmitted video signal using only valid pulses.

13. The method of claim 12, wherein the sequence signal is randomly generated according to a decode protocol.

14. The method of claim 12, wherein a decode signal representing a next generated sequence signal is generated onto the video signal prior to a next generated synchronization of the video signal.

15. The method of claim 12, wherein the decoding step is performed according to a decode lookup table stored in memory.

16. The method of claim 12, wherein the sequence signal is comprised of a plurality of pulses.

17. The method of claim 12, further comprising the steps of:

polling a display device to determine if the display is authorized to display the video signal output; and

disabling decoding if the display device is not authorized.

18. The method of claim 12, wherein the decoding step is executed by a finite state machine.

19. The method of claim 12, wherein the step of generating a horizontal synchronization sequence signal is executed by a finite state machine.

20. The method of claim 12,

wherein the video signal is a horizontal synchronization video signal,

wherein the sequence signal is a horizontal synchronization video signal,

wherein the valid pulse is a valid horizontal synchronization pulse, and

wherein the invalid pulse is an invalid horizontal synchronization pulse.

21. The method of claim 12,

wherein the video signal is a vertical synchronization video signal,

wherein the sequence signal is a vertical synchronization video signal,

wherein the valid pulse is a valid vertical synchronization pulse, and

wherein the invalid pulse is an invalid vertical synchronization pulse.

22. The method of claim 12,

wherein the video signal is an RGB synchronization video signal,

wherein the sequence signal is an RGB synchronization video signal,

wherein the valid pulse is a valid RGB synchronization pulse, and

wherein the invalid pulse is an invalid RGB synchronization pulse.

23. A copy-protected video system to prevent unauthorized copying of a protected video signal transmitted from a video playing device, the video signal comprising a plurality of original video signal pulses, comprising:

a computing device comprising;

a graphics controller to generate a first plurality of additional video signal pulses and a first pulse sequence identifier onto the video signal; and

an encoding device to encode information to identify the locations of the additional video signal pulses, the encoded information contained in the first pulse sequence identifier; and

a display device receiving the video signal from computing device, the display device comprising;

a decoding device for decoding the first pulse sequence identifier from the video signal to determine valid video signal pulses from the plurality of original video signal pulses and additional video signal pulses, the decoding device generating an output signal from the valid video signal pulses.

24. The video system of claim 23, wherein the graphics controller generates a second plurality of additional video signal pulses and a second pulse sequence identifier onto the video signal.

25. The video system of claim 24, wherein the decoder device decodes the second pulse sequence identifier from the video signal to distinguish a second plurality of valid video signal pulses from the second plurality of additional video signal pulses.

26. The video system of claim 24, wherein the decoder device generates an output video signal from the transmitted video signal using only the second plurality of valid video signal pulses.

27. The video system of claim 24, wherein the decoder device decodes the first pulse sequence identifier to determine the location in the video signal of the second pulse sequence identifier.

28. The video system of claim 24 wherein the first, second and subsequent pluralities of additional video signal pulses and the first, second and subsequent pulse sequence identifiers are successively generated onto the video signal.

29. The video system of claim 23, wherein the first plurality of additional video signal pulses and the first pulse sequence identifier are generated after generation of a predetermined number of subsequent pulse sequence identifiers.

30. The video system of claim 23, wherein the first plurality of additional signal pulses and the first pulse sequence identifier are generated onto the video signal during a blanking period.

31. The video system of claim 23, further comprising:

a control device to poll the display device to determine if the display device includes decode circuitry to perform signal pulse and pulse sequence identifier decoding, the control device enabling the decode circuitry to perform decoding if the display device includes the decode circuitry.

32. The video system of claim 23, further comprising:

a control device to poll a video source to determine if the video signal is unprotected, the control device disabling the generation of additional video signals if the video signal is unprotected.

33. The video system of claim 23, wherein the video signal pulses and the additional video signal pulses are horizontal sync pulses.

34. The video system of claim 23, the encoding device comprising:

a finite state macine.

35. The video system of claim 23, the decode circuitry comprising:

a finite state machine

36. The video system of claim 23, the first plurality of video signal pulses comprising:

a first plurality with horizontal sync pulses.

37. The video system of claim 23, wherein the first pulse sequence identifier is encoded onto an RGB video signal.