System and method for performing symbol boundary-aligned search of direct sequence spread spectrum signals

• US 20040062297A1
• Filed: 08/28/2003
• Published: 04/01/2004
• Est. Priority Date: 10/01/2002
• Status: Active Grant

• Current Assignee: Texas Instruments, Inc.
• Original Assignee: Texas Instruments, Inc.
• Inventors: Nambiar, Rajiv R., McDonough, John G., Abdulla, Karim, Jeong, Gibong
• Granted Patent: US 7,324,585 B2
• Time in Patent Office: Days
• US Class Current: 375/150
• CPC Class Codes: H04B 1/70752 Partial correlation
• CPC Class Codes: H04B 1/709 Correlator structure

Abstract

System and method for performing symbol boundary aligned searches of signals. A preferred embodiment comprises a search control unit (such as search control unit 725) that can determine a start and stop condition for a correlation based on a hypothesis, a searcher (such as searcher 705) which includes a multiplexer that can select a subset of samples of a received sequence based on the hypothesis and start and stop conditions. The search control unit can then wait for the occurrence of the start condition and assign the hypothesis to a correlator, which will correlate the subset of samples with a locally generated pseudo-random number sequence based upon the hypothesis.

Claims

1. A method for testing a hypothesis with a symbol aligned correlation comprising:

receiving a hypothesis;

determining a start and a stop condition;

selecting samples from a received sequence based on the start condition; and

providing the samples and hypothesis to a correlator.

2. The method of claim 1, wherein the start condition may be expressed as when a time index modulo N is equal to zero, where N is a length of a symbol.

3. The method of claim 2, wherein when N is a power of 2, then if the time index is expressed as t_mt_m−

1t<sub>m−

2</sub> . . . t₁t₀, then t<sub>n−

1</sub>, t<sub>n−

2</sub>, . . . , t₀ are equal to zero, where n=log₂N.

4. The method of claim 1, wherein the ending condition may be expressed as when a time index is equal to (N−

partial correlation length) modulo N, where N is a length of a symbol and correlation length is a number of chips being correlated together.

5. The method of claim 4, wherein when N is a power of 2, then if the time index is expressed as t_mt_m−

1t<sub>m−

2</sub> . . . t₁t₀, then t<sub>n−

1</sub>, t_n-2, . . . , t₀ are equal to one, where n=log₂N.

6. The method of claim 1, wherein the samples are selected from a group of sampled chips from a received sequence.

7. The method of claim 6, wherein the group of buffered chip samples is of size 2*correlation length−

1, where correlation length is a number of chips being correlated together.

8. The method of claim 1, wherein the samples are selected based on the start and stop conditions.

9. The method of claim 1 further comprising after the selecting, waiting for the starting condition to be met.

10. The method of claim 1, wherein the hypothesis is a plurality of hypotheses, and wherein the determining, selecting, and providing is performed for each hypothesis in the plurality of hypotheses.

11. The method of claim 1 further comprising after the providing:

generating a pseudo-random sequence based on the hypothesis;

correlating the pseudo-random sequence with the samples;

accumulating the correlation results; and

processing the accumulation result.

12. The method of claim 1, wherein the accumulating comprises both coherent and non-coherent accumulation.

13. The method of claim 1 1, wherein the processing comprises comparing the accumulation result with a predetermined threshold.

14. The method of claim 13, wherein the hypothesis is declared a good match if the accumulation result exceeds the predetermined threshold.

15. A circuit comprising:

a search control unit coupled to a hypothesis memory, the search control unit containing circuitry to provide a start and stop condition for a correlation based on a hypothesis read from the hypothesis memory;

a searcher coupled to the search control unit, the searcher containing circuitry to select a subset of samples from a received sequence based on instructions from the search control unit, correlate the subset of samples with a pseudo-random number sequence, and accumulate the correlation results; and

a sequence generator coupled to the search control unit and the searcher, the sequence generator containing circuitry to generate the pseudo-random number sequence based on the hypothesis.

16. The circuit of claim 15, wherein the searcher comprises:

a multiplexer coupled to a received sequence input, the multiplexer containing circuitry to select the subset of samples from the received sequence based on the start and stop condition provided by the search control unit;

a descrambler coupled to the multiplexer and the sequence generator, the descrambler containing circuitry to correlate the subset of samples from the multiplexer with the pseudo-random number sequence from the sequence generator; and

an accumulator coupled to the descrambler, the accumulator containing circuitry to coherently and non-coherently accumulate the correlation results.

17. The circuit of claim 16, wherein the searcher further comprises a result processor coupled to the accumulator, the result processor containing circuitry to determine if the pseudo-random number sequence was a good match for the subset of samples.

18. The circuit of claim 16, wherein the searcher further comprises a sample buffer coupled to the multiplexer, the sample buffer to store samples of the received sequence.

19. The circuit of claim 18, wherein the sample buffer is capable of storing 2*correlation length−

1 samples of the received sequence, where correlation length is the number of samples being correlated together.

20. The circuit of claim 15, wherein the hypothesis stored in the hypothesis memory is stored as a set of search parameters, and wherein the hypothesis is derived from the set of search parameters and a timing reference.

21. A wireless device comprising:

an analog front end coupled to an antenna, the analog front end containing circuitry to filter and amplify a received signal provided by the antenna;

an analog-to-digital converter (ADC), the ADC to convert an analog signal provided by the analog front end into a digital symbol stream;

a search unit coupled to the ADC, the search unit containing circuitry to test hypotheses, wherein the tests are performed along symbol boundaries; and

a processing unit coupled to the ADC, the processing containing circuitry to error detect and correct, decode and despread, and filter the digital symbol stream.

22. The wireless device of claim 21, wherein the search unit comprises:

a search control unit coupled to a hypothesis memory, the search control unit containing circuitry to provide a start and stop condition for a correlation based on a hypothesis read from the hypothesis memory;

a searcher coupled to the search control unit, the searcher containing circuitry to select a subset of samples from a received sequence based on instructions from the search control unit, correlate the subset of samples with a pseudo-random number sequence, and accumulate the correlation results; and

a sequence generator coupled to the search control unit and the searcher, the sequence generator containing circuitry to generate the pseudo-random number sequence based on the hypothesis.

23. The wireless device of claim 22, wherein the searcher comprises:

a multiplexer coupled to a received sequence input, the multiplexer containing circuitry to select the subset of samples from the received sequence based on the start and stop condition provided by the search control unit;

a descrambler coupled to the multiplexer and the sequence generator, the descrambler containing circuitry to correlate the subset of samples from the multiplexer with the pseudo-random number sequence from the sequence generator; and

an accumulator coupled to the descrambler, the accumulator containing circuitry to coherently and non-coherently accumulate the correlation results.

24. The wireless device of claim 21, wherein the wireless device operates in a digital wireless communications network.

25. The wireless device of claim 24, wherein the digital wireless communications network is a UMTS compliant communications network.

26. The wireless device of claim 24, wherein the digital wireless communications network is a CDMA2000 compliant communications network.