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Parallel scrambler/descrambler

  • US 20040062397A1
  • Filed: 07/29/2003
  • Published: 04/01/2004
  • Est. Priority Date: 09/18/2002
  • Status: Active Grant
First Claim
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1. A system for processing a set of data bits using a subset of a recurring sequence of scrambler bits, the system comprising:

  • receiving means for receiving said set of data bits;

    storage means for storing said set of data bits;

    digital logic means for determining an appropriate subset of said sequence of scramble bits;

    generating means for generating said appropriate subset; and

    digital operation means for performing a bitwise parallel digital operation between said appropriate subset and said set of data bits to produce an output set of data bits.

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