METHOD OF ETCHING SHAPED FEATURES ON A SUBSTRATE

• US 20040063328A1
• Filed: 10/01/2002
• Published: 04/01/2004
• Est. Priority Date: 10/01/2002
• Status: Active Grant

• Current Assignee: Applied Materials Incorporated
• Original Assignee: Applied Materials Incorporated
• Inventors: Wen, Jianping, Hu, Hung-Kwei, Shen, Meihua
• Granted Patent: US 6,784,110 B2
• Time in Patent Office: Days
• US Class Current: 438/706
• CPC Class Codes: H01L 21/32137 of silicon-containing layers

Abstract

In a method of etching a substrate, a substrate is provided in a process zone, the substrate having a pattern of features comprising dielectric covering semiconductor. In a first stage, an energized first etching gas is provided in the process zone, the energized first etching gas having a first selectivity of etching dielectric to semiconductor of at least about 1.8:1, wherein the dielectric is etched preferentially to the semiconductor to etch through the dielectric to at least partially expose the semiconductor. In a second stage, an energized second etching gas is provided in the process zone, the energized second etching gas having a second selectivity of etching dielectric to semiconductor of less than about 1:1.8, wherein the semiconductor is etched preferentially to the dielectric.

Claims

1. A substrate etching method comprising:

(a) providing a substrate in a process zone, the substrate having a pattern of features comprising dielectric covering semiconductor;

(b) in a first stage, providing in the process zone, an energized first etching gas having a first selectivity of etching dielectric to semiconductor of at least about 1.8;

1, wherein the dielectric is etched preferentially to the semiconductor to etch through the dielectric to at least partially expose the semiconductor; and

(c) in a second stage, providing in the process zone, an energized second etching gas having a second selectivity of etching dielectric to semiconductor of less than about 1;

1.8, wherein the semiconductor is etched preferentially to the dielectric.

2. A method according to claim 1 wherein the first etching gas comprises a halogenated non-hydrogen-containing gas and a halogenated hydrogen-containing gas, and wherein the second etching gas comprises the same halogenated non-hydrogen-containing gas and a chlorine-containing gas

3. A method according to claim 2 wherein the semiconductor comprises a mesa, and the dielectric comprises a top wall and sidewalls covering the semiconductor mesa, and

wherein in the first stage the energized first etching gas comprises a volumetric flow ratio of the halogenated non-hydrogen-containing gas to the halogenated hydrogen-containing gas selected to etch the top wall of the dielectric to at least partially expose an underlying top surface of the semiconductor mesa;

and

wherein in the second stage, the energized second etching gas comprises the same halogenated non-hydrogen-containing gas and a chlorine-containing gas in a volumetric ratio selected to etch the top surface of the semiconductor mesa and the sidewalls of the dielectric.

4. A method according to claim 3 wherein the semiconductor mesa comprises polysilicon and the dielectric comprises silicon dioxide

5. A method according to claim 2 wherein the halogenated non-hydrogen-containing gas comprises CF₄ and the halogenated hydrogen-containing gas comprises CHF₃.

6. A method according to claim 5 wherein the chlorine-containing gas comprises Cl₂.

7. A method according to claim 1 wherein in the first stage, radiation emissions from the energized first etching gas are monitored to determine an endpoint of the first etching stage, and in the second stage, the intensity of polarized radiation reflected from the substrate surface is monitored to determine an endpoint of the second stage.

8. A method of etching a substrate in a substrate processing chamber comprising an antenna and process electrodes, the method comprising:

(a) providing a substrate in the chamber, the substrate having a pattern of features, the features comprising a semiconductor mesa with a dielectric sidewall;

(b) in a first plasma stage, providing a first etching gas in the chamber and applying a first bias RF power level to the process electrodes and a first source RF power level to the antenna, thereby energizing the first etching gas to etch the semiconductor mesa and the dielectric sidewall; and

(c) in a second plasma stage, providing an energized second etching gas in the chamber and applying a second bias RF power level to the process electrodes and a second source RF power level to the antenna, thereby energizing the second etching gas to etch the semiconductor mesa and a remaining portion of the dielectric sidewall.

9. A method according to claim 8 wherein the first etching gas comprises a first volumetric flow ratio of non-reactive gas to reactive gas, and the second etching gas comprises a second volumetric flow ratio of the non-reactive gas to the reactive gas, the second volumetric flow ratio being greater than the first volumetric flow ratio.

10. A method according to claim 9 wherein the reactive gas comprises CF₄ and non-reactive gas comprises Ar.

11. A method according to claim 9 wherein the first etching gas further comprises O₂.

12. A method according to claim 8 wherein the first RF bias power level is less than the second RF bias power level, and the first RF source power level is greater than the second RF source power level.

13. A method according to claim 12 wherein the first RF bias power level is less than about 100 Watts and the second RF bias power level is at least about 150 Watts.

14. A method according to claim 12 wherein the first RF source power level is at least about 500 Watts and the second RF bias power level is less than about 500 Watts.

15. A method according to claim 8 wherein the semiconductor mesa comprises polysilicon and the dielectric sidewall comprises silicon dioxide.

16. A method of etching a substrate in a substrate processing chamber comprising an antenna and process electrodes:

(a) providing a substrate in the chamber, the substrate having a pattern of features, the features comprising a semiconductor mesa covered by a dielectric top wall and dielectric sidewalls,

(b) in a first etching stage, providing in the chamber, an energized first etching gas comprising a halogenated non-hydrogen-containing gas and a halogenated hydrogen-containing gas in a volumetric ratio selected to etch the dielectric top wall to expose the semiconductor mesa; and

(c) in a second etching stage, providing in the chamber, an energized second etching gas comprising the halogenated non-hydrogen-containing gas and a chlorine-containing gas in a volumetric ratio selected to etch the semiconductor mesa and the dielectric sidewalls;

(d) in a third etching stage, providing a third etching gas in the chamber and applying a first bias RF power level to the process electrodes and a first source RF power level to the antenna, thereby energizing the third etching gas to further etch the semiconductor mesa and the dielectric sidewalls; and

(e) in a fourth etching stage, providing an energized fourth etching gas in the chamber and applying a second bias RF power level to the process electrodes and a second source RF power level to the antenna, thereby energizing the second etching gas to etch the semiconductor mesa and a remaining portion of the dielectric sidewalls.

17. A method according to claim 16 wherein the semiconductor mesa comprises polysilicon, and the dielectric top wall and dielectric sidewalls both comprise silicon dioxide, and wherein the energized first etching gas comprises a volumetric flow ratio of halogenated non-hydrogen-containing gas to halogenated hydrogen-containing gas to provide a first selectivity of etching dielectric to semiconductor of at least about 1.8:

1.

18. A method according to claim 17 wherein the energized second etching gas comprises a volumetric flow ratio of halogenated non-hydrogen-containing gas to chlorine-containing gas to provide a second selectivity of etching dielectric to semiconductor of less than about 1:

1.8, wherein the semiconductor is etched preferentially to the dielectric.

19. A method according to claim 16 wherein the first RF bias power level is less than about 100 Watts and the second RF bias power level is at least about 150 Watts, and wherein the first RF source power level is at least about 500 Watts and the second RF bias power level is less than about Watts.

20. A method according to claim 19 further comprising a fifth etching stage comprising providing in the chamber, an energized fifth etching gas to further etch the semiconductor mesa to a predetermined height.

21. A method according to claim 20 wherein the fifth etching gas comprises at least one of HBr, Cl₂ and HeO₂.

22. A method of etching a substrate in a chamber comprising an antenna and process electrodes, the method comprising:

(a) providing the substrate in the chamber;

(b) in a first stage, providing in the chamber, an energized first etching gas comprising CF₄ and CHF₃;

(c) in a second stage, providing in the chamber, an energized second etching gas comprising CF₄ and C!₂;

(d) in a third stage, providing in the chamber, a third etching gas comprising Ar, CF₄ and O₂, and applying a first bias RF power level to the process electrodes and a first source RF power level to the antenna;

(e) in a fourth stage, providing in the chamber, an energized fourth etching gas comprising Ar and CF₄, and applying a second bias RF power level to the process electrodes and a second source RF power level to the antenna; and

(f) in a fifth stage, providing in the chamber, an energized fifth etching gas comprising HBr, Cl₂ and HeO₂.

23. A method according to claim 22 wherein (b) comprises providing a volumetric flow ratio of CF₄ to CHF₃ of from about 4:

1 to about 1;

4.

24. A method according to claim 22 wherein (c) comprises providing a volumetric flow ratio of CF₄ to Cl₂ of from about 5:

1 to about 2;

1.

25. A method according to claim 22 wherein (d) comprises providing a volumetric flow ratio of Ar to CF₄ and O₂ of from about 1:

1 to about 2;

1.

26. A method according to claim 22 wherein (e) comprises providing a volumetric flow ratio of Ar to CF₄ of from about 8:

1 to about 20;

1.

27. A method according to claim 22 wherein (d) comprises applying a first bias RF power level of from about 0 Watts to about 50 Watts to the process electrodes and a first source RF power level of from about 800 to about 1500 Watts to the antenna.

28. A method according to claim 22 wherein (e) comprises applying a second bias RF power level of from about 150 Watts to about 300 Watts to the electrodes and a second source RF power level of from about 200 Watts to about 400 Watts to the antenna.

29. A method of etching a pattern of features on a substrate in a chamber comprising an antenna and process electrodes, the method comprising:

(a) providing a substrate in the chamber;

(b) in a first stage, providing in the chamber, an energized first etching gas comprising CF₄ and CHF₃ in a volumetric flow ratio of from about 4;

1 to about 1;

4;

(c) in a second stage, providing in the chamber, an energized second etching gas comprising CF₄ and Cl₂ in a volumetric flow ratio of from about 5;

1 to about 2;

1;

(d) in a third stage, providing in the chamber, a third etching gas comprising Ar, CF₄ and O₂, in a volumetric flow ratio of Ar to (CF₄ and O₂) of from about 1;

1 to about 2;

1, applying a first bias RF power level of from about 0 Watts to about 50 Watts to the process electrodes, and applying a first source RF power level of from about 800 to about 1500 Watts to the antenna to energize the third etching gas;

(e) in a fourth stage, providing in the chamber, an energized fourth etching gas comprising Ar and CF₄ in a volumetric flow ratio of from about 8;

1 to about 20;

1, applying a second bias RF power level to the process electrodes of from about 150 Watts to about 300 Watts, and applying a second source RF power level to the antenna of from about 200 Watts to about 400 Watts to energize the second etching gas; and

(f) in a fifth stage, providing in the chamber, an energized fifth etching gas comprising HBr, Cl₂ and HeO₂.