Method and system for using a memory card protocol inside a bus protocol

• US 20040064612A1
• Filed: 09/26/2002
• Published: 04/01/2004
• Est. Priority Date: 09/26/2002
• Status: Abandoned Application

• Current Assignee: SanDisk Technologies LLC (Western Digital Corporation)
• Original Assignee: SanDisk Corporation (Western Digital Corporation)
• Inventors: Pinto, Yoseph, Holtzman, Micky
• Application Number:
  US10/256,689
• Publication Number:
  US 20040064612A1
• Time in Patent Office: Days
• US Class Current: 710/105
• CPC Class Codes: G06F 13/1668 Details of memory controller
• CPC Class Codes: G06F 13/4243 with synchronous protocol

Abstract

A memory system (e.g., memory card) that is able to operate internally in accordance with a first protocol while communicating externally in a second protocol is disclosed. In one embodiment, a memory card operates in accordance with a memory card protocol (e.g., MMC) internally and communicates with a host over a bus protocol (e.g., I²C). As a result, communications between the memory card and the host can utilize the bus protocol by having the bus protocol include the memory card protocol. The memory system is typically a non-volatile memory product or device that provides binary or multi-state data storage.

Claims

1. A memory system that stores data and is controlled by a host that couples to said memory system via a host bus, said memory system comprising:

a plurality of memory blocks, each of said memory blocks including at least a plurality of data storage elements; and

a memory controller operatively coupled to said memory blocks and operatively coupleable to the host via the host bus, said memory controller operating to internally perform read and write operations with respect to the data storage elements for the host in accordance with a first protocol, and said memory controller operating to externally communicate over the host bus in accordance with a second protocol.

2. A memory system as recited in claim 1, wherein the read and write operations are performed with respect to the data storage elements for the host.

3. A memory system as recited in claim 1, wherein said memory controller adds an envelope in accordance with the second protocol around information being transmitted from said memory system to the host over the host bus, and

4. A method system as recited in claim 1, wherein said memory controller removes an envelope in accordance with the second protocol around information being received at said memory system over the host bus from the host.

5. A memory system as recited in claim 1, wherein the first protocol is MultiMedia Card (MMC) protocol and the second protocol is I²C protocol.

6. A memory system as recited in claim 1, wherein the first protocol is Secure Digital (SD) Card protocol and the second protocol is I²C protocol.

7. A memory system as recited in claim 1, wherein hardware layer of the second protocol is used together with higher layers of the first protocol.

8. A memory system as recited in claim 1, wherein the first protocol is a memory card protocol, and wherein the second protocol is a bus protocol.

9. A memory system as recited in claim 1, wherein said memory controller comprises:

a protocol envelope unit operable to encapsulate communications in accordance with the second protocol for transmission over the host bus and to unencapsulate communications out of the second protocol after being received over the host bus.

10. A memory system as recited in claim 1, wherein said data storage elements provide non-volatile data storage.

11. A memory system as recited in claim 10, wherein said data storage elements provide semiconductor-based data storage.

12. A memory system as recited in claim 11, wherein said data storage elements are EEPROM or FLASH.

13. A memory system as recited in claim 1, wherein said memory system is a memory card.

14. A memory system as recited in claim 1, wherein said memory system is provided within a single package.

15. A memory system as recited in claim 14, wherein the single package is a memory card.

16. A memory system as recited in claim 1, wherein said memory system is a removable data storage product.

17. A memory system as recited in claim 1, wherein the host is a computing device.

18. A memory system as recited in claim 1, wherein said memory system removably couples to the host.

19. A method for communicating electronic signals representative of data or commands over a bus coupled between a host and a memory card, said method comprising:

(a) receiving an incoming envelope at the memory card over the bus in accordance with a bus protocol, the incoming envelope including at least incoming data or commands in accordance with a memory card protocol;

(b) removing the incoming envelope to retain the incoming data or commands; and

(c) thereafter processing the incoming data or commands at the memory card in accordance with the memory card protocol.

20. A method as recited in claim 19, wherein said method further comprises:

(d) identifying outgoing data or commands at the memory card in accordance with the memory card protocol;

(e) placing an outgoing envelope around the outgoing data or commands; and

(f) transmitting the outgoing envelope over the bus in accordance with the bus protocol.

21. A method as recited in claim 20, wherein the memory card protocol is MMC and the bus protocol is I²C.

22. A method as recited in claim 19, wherein the memory card provides non-volatile data storage.

23. A method for transmitting information between a peripheral device and a bus associated with a computing device, said method comprising:

(a) obtaining information to transmit, the information obtained being associated with a first protocol;

(b) adapting the information obtained for transmission in a second protocol; and

(c) transmitting the adapted information over the bus using the second protocol.

24. A method as recited in claim 23, wherein the peripheral device is a memory card.

25. A method as recited in claim 24, wherein the peripheral device is a FLASH memory card.

26. A method as recited in claim 23, wherein the peripheral device is a memory card having non-volatile data storage.