Wafer level packaging technique for microdevices
First Claim
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1. A method of fabricating an integrated microdevice, comprising:
- providing a first wafer having on a surface thereof a layer of material selected from the group consisting of;
gold, gold alloy or gold compound;
providing a second wafer with having on a surface thereof an under-layer of material selected from the group consisting of gold, gold alloy or gold compound; and
a solder over-layer selected from the group consisting of bismuth, bismuth alloy, a compound of bismuth, cadmium, cadmium alloy, a compound of cadmium, tin, tin alloy, and a compound of tin; and
bonding said wafers together at said surfaces thereof.
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Abstract
A method is disclosed for fabricating a integrated device, such as a MEMS device. A first wafer is provided on an exposed surface with a layer of gold, gold alloy or gold compound. A second wafer is provided on its exposed surface with under-layer of gold, gold alloy or gold compound; and an over- of bismuth, bismuth alloy, a compound of bismuth, cadmium, cadmium alloy, a compound of cadmium compound, tin, tin alloy, or a compound of tin. The wafers are then brought into contact and bonded at their surfaces through the deposited layers.
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Citations
57 Claims
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1. A method of fabricating an integrated microdevice, comprising:
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providing a first wafer having on a surface thereof a layer of material selected from the group consisting of;
gold, gold alloy or gold compound;
providing a second wafer with having on a surface thereof an under-layer of material selected from the group consisting of gold, gold alloy or gold compound; and
a solder over-layer selected from the group consisting of bismuth, bismuth alloy, a compound of bismuth, cadmium, cadmium alloy, a compound of cadmium, tin, tin alloy, and a compound of tin; and
bonding said wafers together at said surfaces thereof. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46)
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47. A precursor assembly for making an integrated microdevice comprising:
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a base wafer comprising;
a zone to be sealed;
a bonding pad located outside said zone;
a component located inside said zone;
a metal interconnect located at the perimeter of said zone;
an anti-oxidation metal layer selectively deposited said metal barrier layer; and
a cap wafer comprising;
one or more of metal-based interconnects located at said zone;
a metal layer selectively deposited over said metal-based interconnect;
a gold layer selectively deposited over said metal-based interconnect;
a solder layer selectively deposited over the gold layer;
an alignment structure; and
a recessed structure allowing the removal of the portion of the cap wafer outside said zone. - View Dependent Claims (48, 49, 50, 51)
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52. A method of fabricating an integrated microdevice, comprising the steps of:
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fabricating a base wafer including a bonding pad located outside a zone to be sealed, a component inside said zone, a metal interconnect located at the perimeter of said zone, an anti-oxidation layer selectively deposited using immersion plating through a temporary mask, and an alignment structure;
fabricating a cap wafer including a metal-based interconnect located at the perimeter of said zone, a gold layer selectively deposited over said metal-based interconnect using electrolytic plating through a temporary mask, a solder layer selectively deposited over the gold layer using electrolytic plating, an alignment structure and a recessed structure allowing the removal of the portion of this second wafer outside said zone; and
bonding said cap wafer and said base wafer together using said solder layer. - View Dependent Claims (53, 54, 55, 56, 57)
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Specification