Non-contact etch annealing of strained layers

• US 20040067644A1
• Filed: 10/04/2002
• Published: 04/08/2004
• Est. Priority Date: 10/04/2002
• Status: Active Grant

• Current Assignee: Silicon Genesis
• Original Assignee: Silicon Genesis
• Inventors: Kang, Sien G., Current, Michael Ira, Fuerfanger, Martin, Ong, Philip James, Kirk, Harry, Malik, Igor J., Flat, Ariel
• Granted Patent: US 8,187,377 B2
• Time in Patent Office: Days
• US Class Current: 438/689
• CPC Class Codes: C30B 33/00 After-treatment of single crystals or homogeneous polycrystalline material with defined structure C30B31/00 takes precedence
• CPC Class Codes: H01L 21/02381 Silicon, silicon germanium, germanium
• CPC Class Codes: H01L 21/0243 Surface structure
• CPC Class Codes: H01L 21/0245 Silicon, silicon germanium, germanium
• CPC Class Codes: H01L 21/02505 consisting of more than two layers
• CPC Class Codes: H01L 21/0251 Graded layers
• CPC Class Codes: H01L 21/02532 Silicon, silicon germanium, germanium
• CPC Class Codes: H01L 21/02573 Conductivity type
• CPC Class Codes: H01L 21/02658 Pretreatments cleaning in general H01L21/02041
• CPC Class Codes: H01L 21/3065 Plasma etching; Reactive-ion etching

Abstract

The present invention provides for treating a surface of a semiconductor material. The method comprises exposing the surface of the semiconductor material to a halogen etchant in a hydrogen environment at an elevated temperature. The method controls the surface roughness of the semiconductor material. The method also has the unexpected benefit of reducing dislocations in the semiconductor material.

Claims

1. A method of fabricating a semiconductor comprising:

annealing a strained semiconductor material in an etching ambient to minimize increases in surface roughness and defect density, wherein a relaxed semiconductor material is produced.

2. The method of claim 1 further comprising:

growing a second semiconductor material over said relaxed semiconductor material.

3. The method of claim 2, wherein said second semiconductor material comprises a first lattice constant and said relaxed semiconductor material comprises a second lattice constant which is different than said first lattice constant.

4. The method of claim 1, wherein said surface is reduced by at least approximately fifty percent as compared to surface roughness without said etching ambient being present during said annealing.

5. The method of claim 1, wherein dislocation density in said semiconductor material is reduced by approximately two orders of magnitude as compared to dislocation density without said etching ambient being present.

6. The method of claim 1, wherein etch annealing said surface of said semiconductor material comprises exposing said semiconductor material to an etch ambient comprising a halogen bearing etchant.

7. The method of claim 6, wherein said halogen bearing etchant is hydrogen chloride.

8. The method of claim 6, wherein said halogen bearing etchant is hydrogen fluoride.

9. The method of claim 6, wherein etch annealing said surface of said semiconductor material further comprises exposing said semiconductor material to hydrogen.

10. The method of claim 6, wherein etch annealing said surface of said semiconductor material further comprises increasing a temperature of said semiconductor material to between 700 and 1200 degrees Celsius.

11. The method of claim 6, wherein the semiconductor material contains an initial concentration of hydrogen.

12. A method of minimizing dislocations in a semiconductor material comprising:

etch annealing a strained semiconductor material, wherein a relaxed semiconductor material is produced.

13. The method of claim 12 further comprising:

growing a second semiconductor material over said relaxed semiconductor material.

14. The method of claim 13, wherein said second semiconductor material comprises a first lattice constant and said relaxed semiconductor material comprises a second lattice constant which is different than said first lattice constant.

15. The method of claim 12, wherein said roughness of said surface of said semiconductor material is reduced by at least fifty percent as compared to roughness using an inert ambient thermal anneal.

16. The method of claim 12, wherein dislocations in said semiconductor material are reduced by at least two orders of magnitude percent as compared to using an inert ambient thermal anneal.

17. The method of claim 16, wherein etch annealing said surface of said semiconductor material comprises exposing said semiconductor material to an etch ambient comprising a halogen bearing etchant.

18. The method of claim 17, wherein said halogen bearing etchant is hydrogen chloride.

19. The method of claim 17, wherein said halogen bearing etchant is hydrogen fluoride.

20. The method of claim 18, wherein etch annealing said surface of said semiconductor material further comprises exposing said semiconductor material to hydrogen.

21. The method of claim 17, wherein etch annealing said surface of said semiconductor material further comprises increasing a temperature of said semiconductor material to between 700 and 1200 degrees Celsius.

22. The method of claim 17, wherein the semiconductor material contains an initial concentration of hydrogen.

23. A method of treating a surface of a semiconductor material comprising:

providing said semiconductor material having a surface characterized by a surface roughness and a dislocation density;

increasing a temperature of said surface to greater than approximately 700 degrees Celsius; and

exposing said surface to an etchant selected from the group comprising hydrogen-chloride (HCl), hydrogen-fluoride (HF), hydrogen-bromide (HBr), hydrogen-iodine (HI), sulfur-hexafluoride (SF6), carbon-tetrafluoride (CF₄), nitrogen-trifluoride (NF₃), and difluoride-dichloride-methane (CCl₂F₂).

24. The method of claim 23, wherein surface roughness and dislocation density increases during said increasing and exposing steps are minimized.

25. The method of claim 23, further comprising exposing said surface to hydrogen (H).

26. The method of claim 25, wherein said etchant is hydrogen-chloride (HCl).

27. The method of claim 26, wherein a ratio of said hydrogen-chloride to said hydrogen is approximately 0.001 to 10.

28. The method of claim 26, wherein a ratio of said hydrogen-chloride to said hydrogen is approximately 0.001 to 30.