Perovskite cuprate electronic device structure and process

• US 20040069991A1
• Filed: 10/10/2002
• Published: 04/15/2004
• Est. Priority Date: 10/10/2002
• Status: Abandoned Application

• Current Assignee: Freescale Semiconductor, Inc. (NXP Semiconductors NV)
• Original Assignee: Motorola, Inc. (Motorola Solutions, Inc.)
• Inventors: Petsinger, Jeffrey, Dunn, Gregory, Croswell, Robert
• Application Number:
  US10/267,692
• Publication Number:
  US 20040069991A1
• Time in Patent Office: Days
• US Class Current: 257/75
• CPC Class Codes: H01L 21/02197 the material having a perovskite structure, e.g. BaTiO3
• CPC Class Codes: H01L 21/02236 group IV semiconductor
• CPC Class Codes: H01L 21/02293 formation of epitaxial layers by a deposition process epitaxial growth per se C30B
• CPC Class Codes: H01L 21/02304 formation of intermediate layers, e.g. buffer layers, layers to improve adhesion, lattice match or diffusion barriers
• CPC Class Codes: H01L 21/31691 with perovskite structure
• CPC Class Codes: H10N 60/0941 comprising high-Tc ceramic materials
• CPC Class Codes: H10N 69/00 Integrated devices, or assemblies of multiple devices, comprising at least one superconducting element covered by group H10N60/00
• CPC Class Codes: H10N 99/03 Devices using Mott metal-insulator transition, e.g. field-effect transistor-like devices

Abstract

High quality epitaxial layers of monocrystalline materials (26) can be grown overlying monocrystalline substrates (22) such as large silicon wafers by forming a compliant substrate for growing the monocrystalline layers. An accommodating buffer layer (24) comprises a layer of monocrystalline oxide spaced apart from a silicon wafer by an amorphous interface layer (28) of silicon oxide. The amorphous interface layer dissipates strain and permits the growth of a high quality monocrystalline oxide accommodating buffer layer. Any lattice mismatch between the accommodating buffer layer and the underlying silicon substrate is taken care of by the amorphous interface layer. Some preferred electronic devices are described that use a layer or pattern of a perovskite cuprate (2125, 2305, 2310, 2315, 2405) such as YBa₂Cu₃O_7−y(YBCO) or Y_1−xPr_xBa₂Cu₃O_7−y(YPBCO, 0<x<1) over a buffer layer (2120) of lanthanum strontium aluminum tantalate (LSAT).

Claims

1. A perovskite cuprate electronic device structure, comprising:

a monocrystalline silicon substrate;

a buffer layer comprising a layer of monocrystalline lanthanum strontium aluminum tantalate (LSAT) formed overlying the monocrystalline silicon substrate; and

a layer of monocrystalline perovskite cuprate formed on the layer of monocrystalline LSAT.

2. The perovskite cuprate electronic device structure according to claim 1, wherein the monocrystalline LSAT is a solid solution of 30 mole % LaAlO₃ and 70 mole % Sr₂AlTaO₆.

3. The perovskite cuprate electronic device structure according to claim 1, wherein the monocrystalline perovskite cuprate is one of YBa₂Cu₃O₇₋

y(YBCO) and Y<sub>1−

x</sub>Pr_xBa₂Cu₃O<sub>7−

y</sub>(YPBCO, 0<

x<

1).

4. The perovskite cuprate electronic device structure according to claim 1, further comprising an amorphous oxide interface layer formed at an interface between the monocrystalline silicon substrate and the buffer layer.

5. The perovskite cuprate electronic device structure according to claim 4, wherein the amorphous oxide interface layer is formed at least partially during formation of the buffer layer by oxidation of an adjacent surface of the monocrystalline silicon substrate.

6. The perovskite cuprate electronic device structure according to claim 1, wherein the buffer layer further comprises a layer of one of strontium titanate or barium strontium titanate formed between the monocrystalline silicon substrate and the layer of monocrystalline LSAT.

7. The perovskite cuprate electronic device structure according to claim 1, further comprising a monocrystalline compound semiconductor layer formed on one of the buffer layer and the monocrystalline perovskite cuprate layer.

8. The perovskite cuprate electronic device structure according to claim 1, comprising at least one of a Mott transistor, a superconducting microstrip transmission line, a tunable superconducting microstrip transmission line, a superconducting coplanar waveguide, and a Josephson junction.

9. An integrated circuit comprising the electronic device structure according to claim 1.

10. An electronic equipment comprising the integrated circuit according to claim 9.

11. A process for fabricating a perovskite cuprate electronic device structure comprising:

depositing a buffer layer comprising monocrystalline lanthanum strontium aluminum tantalate (LSAT) overlying a monocrystalline silicon substrate;

forming an amorphous oxide interface layer containing at least silicon and oxygen at an interface between the buffer layer and the monocrystalline silicon substrate; and

epitaxially forming a layer of monocrystalline perovskite cuprate on the monocrystalline LSAT.

12. The process for fabricating a perovskite cuprate electronic device structure according to claim 11, wherein the monocrystalline LSAT is a solid solution of 30 mole % LaAlO₃ and 70 mole % Sr₂AlTaO₆.

13. The process for fabricating a perovskite cuprate electronic device structure according to claim 11, wherein the monocrystalline perovskite cuprate is one of YBa₂Cu₃O₇₋

y(YBCO) and Y<sub>1−

x</sub>Pr_xBa₂Cu₃O<sub>7−

y</sub>(YPBCO, 0<

x<

1).

14. The process for fabricating a perovskite cuprate electronic device structure according to claim 11, wherein the amorphous oxide interface layer is formed at least partially during the formation of the buffer layer by oxidation of an adjacent surface of the monocrystalline silicon substrate.

15. The process for fabricating a perovskite cuprate electronic device structure according to claim 11, wherein forming a buffer layer comprises forming of one of strontium titanate or barium strontium titanate between the monocrystalline silicon substrate and the monocrystalline LSAT.

16. The process for fabricating a perovskite cuprate electronic device structure according to claim 11, further comprising forming a monocrystalline compound semiconductor layer on one of the buffer layer and the monocrystalline perovskite cuprate layer.

17. The process for fabricating a perovskite cuprate electronic device structure according to claim 11, further comprising forming at least one of a Mott transistor, a superconducting microstrip transmission line, a tunable superconducting microstrip transmission line, a superconducting coplanar waveguide, and a Josephson junction.