Active-matrix display device and method of driving the same

• US 20040070557A1
• Filed: 09/23/2003
• Published: 04/15/2004
• Est. Priority Date: 10/11/2002
• Status: Active Grant

• Current Assignee: Sony Corporation (Sony Group Corp.)
• Original Assignee: Sony Corporation (Sony Group Corp.)
• Inventors: Asano, Mitsuru, Yumoto, Akira
• Granted Patent: US 7,057,588 B2
• Time in Patent Office: Days
• US Class Current: 345/76
• CPC Class Codes: G09G 2300/0819 used for counteracting undesired variations, e.g. feedback or autozeroing
• CPC Class Codes: G09G 2300/0838 with level shifting
• CPC Class Codes: G09G 2300/0852 being a dynamic memory with more than one capacitor
• CPC Class Codes: G09G 2300/0861 with additional control of the display period without amending the charge stored in a pixel memory, e.g. by means of additional select electrodes
• CPC Class Codes: G09G 2310/0262 The addressing of the pixel, in a display other than an active matrix LCD, involving the control of two or more scan electrodes or two or more data electrodes, e.g. pixel voltage dependent on signals of two data electrodes
• CPC Class Codes: G09G 2320/043 Preventing or counteracting the effects of ageing
• CPC Class Codes: G09G 2330/021 Power management, e.g. power saving
• CPC Class Codes: G09G 3/3233 with pixel circuitry controlling the current through the light-emitting element

Abstract

In an active-matrix display device and a method for driving the active-matrix display device, a fifth transistor is connected between a power line and a drain terminal of a first transistor so that a power-supply voltage, namely the fixed voltage required for the compensation of the threshold voltage, is supplied by the power line via a fifth transistor and not by a signal line. Thus, a sufficient length of time for the threshold voltage compensation period can be maintained, and a second transistor of each pixel can accurately be compensated for threshold voltage irregularities.

Claims

1. An active-matrix display device comprising:

pixel circuits arrayed in a matrix;

signal lines each of which is interconnected with a corresponding column of the matrix-arrayed pixel circuits; and

a first scanning line, a second scanning line, a third scanning line, and a fourth scanning line which are interconnected with a corresponding row of the matrix-arrayed pixel circuits;

each of the pixel circuits comprising;

a first transistor of which a gate terminal is connected with the first scanning line and of which a first electrode terminal is connected with one of the signal lines;

a first capacitor of which a first end is connected with a second electrode terminal of the first transistor;

a second capacitor of which a first terminal is connected with the first end or a second end of the first capacitor;

a second transistor of which a gate terminal is connected with the second end of the first capacitor and of which a first electrode terminal is connected with a first power line;

a third transistor of which a gate terminal is connected with the second scanning line, a first electrode terminal of the third transistor is connected with the gate terminal of the second transistor, and a second electrode terminal of the third transistor is connected with a second electrode terminal of the second transistor;

a fourth transistor of which a gate terminal is connected with the third scanning line and of which a first electrode terminal is connected with the second electrode terminal of the second transistor;

a fifth transistor of which a gate terminal is connected with the fourth scanning line, a first electrode terminal of the fifth transistor is connected with a third power line, and a second electrode terminal of the fifth transistor is connected with the second electrode terminal of the first transistor; and

a display element connected with both a second electrode terminal of the fourth transistor and a second power line.

2. The active-matrix display device according to claim 1, wherein the third transistor and the fifth transistor have the same conductivity type, and the second scanning line and the fourth scanning line are combined as a common line.

3. The active-matrix display device according to claim 1, wherein the third transistor and the fourth transistor have opposite conductivity types, and the second scanning line and the third scanning line are combined as a common line.

4. The active-matrix display device according to claim 1, wherein the fourth transistor and the fifth transistor have opposite conductivity types, and the third scanning line and the fourth scanning line are combined as a common line.

5. The active-matrix display device according to claim 1, wherein the third transistor and the fifth transistor have a conductivity type opposite to that of the fourth transistor;

and the second scanning line, the third scanning line, and the fourth scanning line are combined as a common line.

6. The active-matrix display device according to claim 1, wherein the first power line and the third power line are combined as a common line.

7. The active-matrix display device according to claim 1, wherein a power-supply voltage of the third power line is lower than that of the first power line.

8. The active-matrix display device according to claim 7, wherein the power-supply voltage of the third power line is variable.

9. The active-matrix display device according to claim 1, wherein the first to fifth transistors are polysilicon thin film transistors.

10. The active-matrix display device according to claim 1, wherein the display element is an organic electroluminescent element which includes an organic layer having a luminous layer disposed between a first electrode and a second electrode.

11. A method for driving an active-matrix display device, the device comprising pixel circuits arrayed in a matrix;

signal lines each of which is interconnected with a corresponding column of the matrix-arrayed pixel circuits; and

a first scanning line, a second scanning line, a third scanning line, and a fourth scanning line which are interconnected with a corresponding row of the matrix-arrayed pixel circuits;

each of the pixel circuits comprising

a first transistor of which a gate terminal is connected with the first scanning line and of which a first electrode terminal is connected with one of the signal lines;

a first capacitor of which a first end is connected with a second electrode terminal of the first transistor;

a second capacitor of which a first terminal is connected with the first end or a second end of the first capacitor;

a second transistor of which a gate terminal is connected with the second end of the first capacitor and of which a first electrode terminal is connected with a first power line;

a third transistor of which a gate terminal is connected with the second scanning line, a first electrode terminal of the third transistor is connected with the gate terminal of the second transistor, and a second electrode terminal of the third transistor is connected with a second electrode terminal of the second transistor;

a fourth transistor of which a gate terminal is connected with the third scanning line and of which a first electrode terminal is connected with the second electrode terminal of the second transistor;

a fifth transistor of which a gate terminal is connected with the fourth scanning line, a first electrode terminal of the fifth transistor is connected with a third power line, and a second electrode terminal of the fifth transistor is connected with the second electrode terminal of the first transistor; and

a display element connected between a second electrode terminal of the fourth transistor and a second power line;

the method comprising the steps of;

turning the first transistor and the fourth transistor off while turning the third transistor and the fifth transistor on to compensate a threshold voltage of the second transistor in each pixel; and

turning the first transistor on while turning the third transistor and the fifth transistor off to write display data into each pixel from the signal line.

12. The method for driving an active-matrix display device according to claim 11, wherein a period for compensating the threshold voltage and a period for writing the display data reside simultaneously in pixels which are in different rows and are connected along the same signal line.