Synchronous buck and boost regulator power reduction circuit using high side sensing

• US 20040070906A1
• Filed: 10/15/2002
• Published: 04/15/2004
• Est. Priority Date: 10/15/2002
• Status: Active Grant

• Current Assignee: Texas Instruments, Inc.
• Original Assignee: Texas Instruments, Inc.
• Inventors: Baldwin, David J., Kohout, James A.
• Granted Patent: US 6,995,483 B2
• Time in Patent Office: Days
• US Class Current: 361/92
• CPC Class Codes: H02M 1/0009 Devices or circuits for detecting current in a converter
• CPC Class Codes: H02M 1/32 Means for protecting converters other than automatic disconnection
• CPC Class Codes: H02M 3/1588 comprising at least one synchronous rectifier element H02M3/1582, H02M3/1584 take precedence
• CPC Class Codes: H03K 2217/0027 Measuring means of, e.g. currents through or voltages across the switch
• CPC Class Codes: Y02B 70/10 Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes

Abstract

A synchronous DC-DC regulator, adapted to receive a high side pulsed signal and a low side pulsed signal that is substantially the inverse of the high side pulsed signal. The regulator includes an inductor, and a capacitor having one port connected to ground, and having a second port providing an output voltage of the DC-DC. A driver is provided for driving pulses of current to the inductor when the high side pulsed signal is asserted. A switch and a diode are provided, adapted to provide a path for the inductor to drive current to charge the capacitor when the high side pulsed signal is not asserted. An undercurrent sense circuit is adapted to sense a driving current flowing through the driver and to assert a disable signal when the driving current is less than a predetermined amount. An enable/disable circuit is adapted to allow the low side pulsed signal to turn the switch on when the disable signal is not asserted, and to not allow the low side pulsed signals from turning the switch on when the disable signal is asserted.

Claims

1. A synchronous DC-DC regulator, adapted to receive a high side pulsed signal and a low side pulsed signal that is substantially the inverse of the high side pulsed signal, comprising:

an inductor;

a capacitor having one port connected to ground, and having a second port providing an output voltage of the DC-DC regulator;

a driver for driving pulses of current to the inductor when the high side pulsed signal is asserted;

a switch and a diode adapted to provide a path for the inductor to drive current to charge the capacitor when the high side pulsed signal is not asserted;

an undercurrent sense circuit adapted to sense a driving current flowing through the driver and to assert a disable signal when the driving current is less than a predetermined amount; and

an enable/disable circuit adapted to allow the low side pulsed signal to turn the switch on when the disable signal is not asserted, and to not allow the low side pulsed signals from turning the switch on when the disable signal is asserted.

2. A synchronous DC-DC switching regulator as in claim 1, wherein the switch comprises a MOSFET transistor, and wherein the diode comprises a parasitic diode formed as part of the MOSFET transistor.

3. A synchronous DC-DC switching regulator as in claim 1, wherein the undercurrent sense circuit comprises:

a current sense circuit adapted to sense the driving current through the driver and provide a scaled current in response thereto; and

a current source in series with the current sense circuit between a power supply and ground, whereby a voltage at the common node of the current sense circuit and current source depends on whether the driving current is more than or less than the predetermined amount.

4. A synchronous DC-DC regulator, adapted to receive a high side pulsed signal and a low side pulsed signal that is substantially the inverse of the high side pulsed signal, comprising:

an inductor, having a first port and a second port;

a capacitor connected between the second port of the inductor and ground, the common connection node of the capacitor and the inductor providing an output voltage of the DC-DC switching regulator;

a driver for driving pulses of current to the first port of the inductor when the high side pulsed signal is asserted;

a switch and a diode connected in parallel between the first port of the inductor and ground;

an undercurrent sense circuit adapted to sense a driving current flowing through the driver and to assert a disable signal when the driving current is less than a predetermined amount; and

an enable/disable circuit adapted to allow the low side pulsed signal to turn the switch on when the disable signal is not asserted, and to not allow the low side pulsed signals from turning the switch on when the disable signal is asserted.

5. A synchronous DC-DC switching regulator as in claim 4, wherein the switch comprises a MOSFET transistor, and wherein the diode comprises a parasitic diode formed as part of the MOSFET transistor.

6. A synchronous DC-DC switching regulator as in claim 4, wherein the undercurrent sense circuit comprises:

a current sense circuit adapted to sense a driving current through the driver and provide a scaled current in response thereto; and

a current source in series with the current sense circuit between a power supply and ground, whereby a voltage at the common node of the current sense circuit and current source depends on whether the driving current is more than or less than the predetermined amount.

7. A synchronous DC-DC switching regulator as in claim 4, wherein:

the switch comprises a MOSFET transistor connected between the common connection node of the inductor and the driver, and ground, and having a gate; and

the enable/disable circuit comprises a two-input AND gate adapted to receive the low side pulsed signal at a first input and to receive the disable signal at a second input, having its output connected to the gate of the gate of the transistor, wherein the disable signal is asserted as a negative level signal.

8. A synchronous DC-DC regulator, adapted to receive a high side pulsed signal and a low side pulsed signal that is substantially the inverse of the high side pulsed signal, comprising:

an inductor, having a first port, and having a second port;

a driver for driving pulses of current to the first port of the inductor when the high side pulsed signal is asserted;

a capacitor having a first port, and having a second port connected to ground;

a first switch and a diode connected in parallel between the first port of the inductor and ground;

a second switch connected between the second port of the inductor and ground;

a third switch connected between the common connection node of the second switch and the inductor, and the second node of the capacitor, a coupling node of the third switch and the capacitor providing an output voltage of the DC-DC switching regulator;

an undercurrent sense circuit adapted to sense an operating current flowing through the driver and to assert a disable signal when the operating current is less than a predetermined amount; and

an enable/disable circuit adapted to allow the low side pulsed signal to turn the first switch on when the disable signal is not asserted, and to not allow the low side pulsed signals to turn the first switch on when the disable signal is asserted.

9. A synchronous DC-DC regulator, adapted to receive a high side pulsed signal and a low side pulsed signal that is substantially the inverse of the high side pulsed signal, comprising:

an inductor, having a first port, and having a second port connected to ground;

a driver for driving pulses of current to the first port of the inductor when the high side pulsed signal is asserted;

a capacitor having a first port, and having a second port connected to ground;

a switch and a diode connected in parallel between the first port of the inductor and the first port of the capacitor, a coupling node of the switch and the capacitor providing an output voltage of the DC-DC switching regulator;

an undercurrent sense circuit adapted to sense an operating current flowing through the driver and to assert a disable signal when the operating current is less than a predetermined amount; and

an enable/disable circuit adapted to allow the low side pulsed signal to turn the switch on when the disable signal is not asserted, and to not allow the low side pulsed signals from turning the switch on when the disable signal is asserted.