Memory device, terminal apparatus, and data repair system

• US 20040073846A1
• Filed: 08/19/2003
• Published: 04/15/2004
• Est. Priority Date: 01/31/2002
• Status: Abandoned Application

• Current Assignee: Matsushita Electric Industrial Company Limited (Panasonic Holdings Corporation)
• Original Assignee: Matsushita Electric Industrial Company Limited (Panasonic Holdings Corporation)
• Inventors: Sasaki, Osamu, Takagi, Yoshihiko, Nakanishi, Yoshiaki
• Application Number:
  US10/467,067
• Publication Number:
  US 20040073846A1
• Time in Patent Office: Days
• US Class Current: 714/42
• CPC Class Codes: G06F 11/1004 to protect a block of data words, e.g. CRC or checksum G06F11/1076 takes precedence; security arrangements for protecting computers or computer systems against unauthorized activity G06F21/00
• CPC Class Codes: G06F 21/64 Protecting data integrity, e.g. using checksums, certificates or signatures
• CPC Class Codes: G06F 21/78 to assure secure storage of data address-based protection against unauthorised use of memory G06F12/14; record carriers for use with machines and with at least a part designed to carry digital markings G06K19/00

Abstract

A system includes server 10 that manages data and check information for checking damage to the data, terminal apparatus 20 that acquires the data and the check information from server 10, and memory device 30 that stores the data acquired by terminal apparatus 20 into non-tamper-resistant memory area 31 and the check information acquired by terminal apparatus 20 into tamper-resistant memory area 32. Memory device 30 detects data in which data damage has occurred using the check information. Terminal apparatus 20 acquires the detected data from server 10, and memory device 30 repairs the data damage using the data acquired by terminal apparatus 20. This improves the storage efficiency of memory device 30, and furthermore, reduces the data communication time taken for acquiring normal data for repair from server 10.

Claims

1. A memory device comprising:

a tamper-resistant memory area; and

a non-tamper-resistant memory area,

wherein data is stored in said non-tamper-resistant memory area and check information used for checking damage to the data is stored in said tamper-resistant memory area.

2. A memory device comprising:

a first memory area having no tamper resistance that stores data;

a second memory area having tamper resistance that stores check information used for checking data damage;

a write section that writes data acquired from an external source into said first memory area and writes the check information into said second memory area;

a check section that checks data damage using the check information; and

a read section that reads out data which is judged by said check section as normal,

wherein said check section judges whether the data acquired from the external source is normal or not on a block-by-block basis.

3. The memory device according to claim 2, wherein the check information contains check information on a block-by-block basis for the data acquired from the external source, and said write section writes the check information into said second memory area.

4. The memory device according to claim 2, wherein said write section acquires the check information via an encrypted communication path and writes the check information into said second memory area.

5. The memory device according to claim 3, wherein said write section acquires the check information via an encrypted communication path and writes the check information into said second memory area.

6. The memory device according to claim 3, wherein said write section writes the check information into said second memory area after authenticating a signature affixed to the check information acquired from the external source.

7. The memory device according to claim 2, wherein said write section acquires check information used for checking data damage, creates test information for verifying the check information, writes said test information for verification into said second memory area, and writes the check information used for checking data damage into said first memory area.

8. The memory device according to claim 7, wherein said write section acquires the check information to which a signature is affixed, creates test information for verifying the check information to which the signature is affixed, writes said test information for verification into said second memory area, and writes the check information to which the signature is affixed into said first memory area.

9. The memory device according to claim 2, wherein said write section checks damage to data which is written into said first memory area using the check information, and writes normal data into said first memory area.

10. The memory device according to claim 2, wherein the check information contains issuance source information which indicates an acquisition source of data to be checked, and when a block unit in which data damage has occurred is detected using the check information, said check section outputs an error report which contains the issuance source information and information indicating the block unit.

11. The memory device according to claim 3, wherein the check information contains issuance source information which indicates an acquisition source of data to be checked, and when a block unit in which data damage has occurred is detected using the check information, said check section outputs an error report which contains the issuance source information and information indicating the block unit.

12. The memory device according to claim 2, wherein the check information contains issuance source information which indicates an acquisition source of data to be checked, and when a block unit in which data damage has occurred is detected using the check information, said check section outputs a distribution request of the data in the block unit to the issuance source.

13. The memory device according to claim 3, wherein the check information contains issuance source information which indicates an acquisition source of data to be checked, and when a block unit in which data damage has occurred is detected using the check information, said check section outputs a distribution request of the data in the block unit to the issuance source.

14. The memory device according to claim 10, wherein said check section checks spontaneously the block unit affected by data damage.

15. The memory device according to claim 11, wherein said check section checks spontaneously the block unit affected by data damage.

16. The memory device according to claim 12, wherein said check section checks spontaneously the block unit affected by data damage.

17. The memory device according to claim 13, wherein said check section checks spontaneously the block unit affected by data damage.

18. The memory device according to claim 2, wherein operation is ceased when the number of times of detection made by said check section for detecting the block unit in which data damage has occurred exceeds a threshold.

19. The memory device according to claim 2, wherein said read section sequentially reads out data in a block unit judged by said check section as normal.

20. The memory device according to claim 2, further comprising a correction section that checks the data in a block unit acquired from the external source using the check information, and writes the data into said first memory area when the data is normal.

21. The memory device according to claim 10, further comprising a correction section that acquires data in a block unit corresponding to the error report from the external source, checks the data using the check information, and writes the data into said first memory area when the data is normal.

22. The memory device according to claim 11, further comprising a correction section that acquires data in a block unit corresponding to the error report from the external source, checks the data using the check information, and writes the data into said first memory area when the data is normal.

23. The memory device according to claim 2, further comprising a decryption section that decrypts encrypted data,

wherein said decryption section decrypts only a block unit of encrypted data judged by said check section as normal, and said read section sequentially reads out data in the block unit decrypted by said decryption section.

24. The memory device according to claim 2, further comprising a decryption section that decrypts encrypted data,

wherein said check section checks data damage contained in data in a block unit decrypted by said decryption section using the check information, and said read section sequentially reads out data in a block unit judged as normal by said check section.

25. The memory device according to claim 20, further comprising a check information update section that updates the check information prior to checking data to be checked,

wherein said correction section writes the data into said first memory area.

26. A terminal apparatus that stores data in a non-tamper-resistant memory area of a memory device and stores check information used for checking damage to the data in a tamper-resistant memory area of the memory device.

27. A terminal apparatus that acquires from a server data separated on a block-by-block basis and check information for checking data damage to each block, stores the data in a first memory area having no tamper resistance in a memory device, and stores the check information in a second memory area having tamper resistance in the memory device.

28. The terminal apparatus according to claim 27 that, upon reception of an error report indicating a block in which data damage has occurred from the memory device, acquires data of the block from the server, and stores the acquired data in the first memory area of the memory device.

29. The terminal apparatus according to claim 27 that, when a distribution request to an issuance source of the data in a block unit in which data damage has occurred is outputted from the memory device, acquires the data of the block from a server of the issuance source and stores the acquired data in the first memory area of the memory device.

30. The terminal apparatus according to claim 28 that, when the number of times of the error report from the memory device or the number of times of the distribution request from the memory device exceeds a threshold, ceases data acquisition from the server.

31. The terminal apparatus according to claim 29 that, when the number of times of the error report from the memory device or the number of times of the distribution request from the memory device exceeds a threshold, ceases data acquisition from the server.

32. A data repair system comprising:

a server that manages data and check information for checking damage to the data;

a terminal apparatus that acquires the data and the check information from said server; and

a memory device that stores the data acquired by said terminal apparatus from said server into a non-tamper-resistant memory area and stores the check information acquired by said terminal apparatus from said server into a tamper-resistant memory area,

wherein said memory device detects damage to the data using the check information, and said terminal apparatus acquires data for which damage has been detected from said server, and said memory device repairs the data damage by using the data acquired by said terminal apparatus.

33. A data repair system comprising:

a server that manages data separated on a block-by-block basis and check information for checking damage to the data in each block;

a terminal apparatus that acquires the data and the check information from said server; and

a memory device that stores the data acquired by said terminal apparatus into a first memory area having no tamper resistance and stores the check information acquired by said terminal apparatus into a second memory area having tamper resistance,

wherein said memory device detects a block in which data damage has occurred using the check information, and said terminal apparatus acquires data in the detected block, and said memory device repairs the data damage by using the data acquired by said terminal apparatus.

34. The data repair system according to claim 33, wherein said terminal apparatus acquires the check information from said server prior to the data, and said memory device stores the check information and, when reading of the data is requested, detects the data, which is not yet stored, as damaged data, and upon such detection, said terminal apparatus acquires the data from said server and stores the acquired data in said memory device.

35. A memory device comprising:

a first memory area having no tamper resistance that stores data;

a second memory area having tamper resistance that stores check information used for checking data damage;

a write section that writes data acquired from an external source into said first memory area and writes the check information into said second memory area;

a check section that checks damage to the data acquired from the external source using the check information; and

a read section that reads out data judged by said check section as normal.

36. A terminal apparatus that acquires from a server data and check information for checking damage to the data, stores the data in a first memory area having no tamper resistance in a memory device and stores the check information in a second memory area having tamper resistance in the memory device.

37. A data repair system comprising:

a server that manages data and check information for checking damage to the data;

a terminal apparatus that acquires the data and the check information from said server; and

a memory device that stores the data acquired by said terminal apparatus into a first memory area having no tamper resistance and stores the check information acquired by said terminal apparatus into a second memory area having tamper resistance,

wherein said memory device detects whether the data is damaged or not using the check information, and said terminal apparatus acquires data for which damage has been detected from said server, and said memory device repairs the data damage by using the data acquired by said terminal apparatus.