High frequency integrated circuits

• US 20040075170A1
• Filed: 10/21/2002
• Published: 04/22/2004
• Est. Priority Date: 10/21/2002
• Status: Abandoned Application

• Current Assignee: Charley Chunlei Gao, Huainan Ma, King Lien Tai, Yinon Degani
• Original Assignee: Charley Chunlei Gao, Huainan Ma, King Lien Tai, Yinon Degani
• Inventors: Degani, Yinon, Gao, Charley Chunlei, Tai, King Lien, Ma, Huainan
• Application Number:
  US10/277,239
• Publication Number:
  US 20040075170A1
• Time in Patent Office: Days
• US Class Current: 257/724
• CPC Class Codes: H01L 2224/0401 Bonding areas specifically adapted for bump connectors, e.g. under bump metallisation [UBM]
• CPC Class Codes: H01L 2224/16 of an individual bump connector
• CPC Class Codes: H01L 23/66 High-frequency adaptations
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00014 the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/01078 Platinum [Pt]
• CPC Class Codes: H01L 2924/01087 Francium [Fr]
• CPC Class Codes: H01L 2924/10253 Silicon [Si]
• CPC Class Codes: H01L 2924/3011 Impedance

Abstract

The specification describes a silicon-on-silicon interconnection arrangement to implement high performance RF impedance matching using off-chip passive components. The RF sections of the system are disintegrated into separate RF functional chips, and the functional chips are flip-chip mounted on a high resistivity silicon intermediate interconnect substrate (SIIS). The passive devices for the impedance matching networks are built into the high resistivity SIIS using thin-film technology.

Claims

1. An RF integrated circuit device comprising:

a. a silicon-on-silicon module comprising a silicon integrated circuit chip bonded to a silicon intermediate interconnection substrate (SIIS),

b. a first conductive layer, formed on the SIIS, with an electrical connection between the first conductive layer and the silicon integrated circuit chip,

c. an insulating layer on the first conductive layer,

d. a second conductive layer, formed on the insulating layer, with an electrical connection between the second conductive layer and the silicon integrated circuit.

2. The RF integrated circuit device of claim 1 additionally including a printed wiring board (PWB) and means for attaching the SIIS to the PWB.

3. An RF integrated circuit device comprising:

a. a silicon substrate, the silicon substrate having intrinsic resistivity,

b. a first high frequency RF integrated circuit chip mounted on the silicon substrate;

c. a second high frequency RF integrated circuit chip mounted on the silicon substrate,

d. a thin film capacitor formed on the silicon substrate;

e. a thin film inductor formed on the silicon substrate;

f. interconnection means interconnecting the capacitor and inductor to form an LC circuit;

g. interconnection means electrically connecting the LC circuit between the first high frequency RF integrated circuit and the second high frequency RF integrated circuit.

4. The RF integrated circuit device of claim 3 additionally including a printed wiring board (PWB) and means for attaching the silicon substrate to the PWB.

5. The RF integrated circuit device of claim 3 wherein the first and second high frequency RF integrated circuit chips are silicon chips.

6. The RF integrated circuit device of claim 5 additionally including a GaAs high frequency RF integrated circuit chip mounted on the silicon substrate.

8. The high frequency RF integrated circuit device of claim 4 additionally including a printed wiring board (PWB) and means for attaching the silicon substrate to the PWB.

9. The high frequency RF integrated circuit device of claim 8 additionally including a GaAs high frequency RF integrated circuit chip mounted on the silicon substrate.

7. A high frequency RF integrated circuit device comprising:

a. a silicon substrate, the silicon substrate having intrinsic resistivity,

b. a first high frequency RF integrated circuit chip mounted on the silicon substrate, the first high frequency RF integrated circuit chip comprising an IF circuit block;

c. a second high frequency RF integrated circuit chip mounted on the silicon substrate, the second high frequency RF integrated circuit chip comprising a mixer circuit block;

d. a third high frequency RF integrated circuit chip mounted on the silicon substrate, the third high frequency RF integrated circuit chip comprising a low noise amplifier circuit block;

e. a fourth high frequency RF integrated circuit chip mounted on the silicon substrate, the fourth high frequency RF integrated circuit chip comprising a voltage controlled oscillator circuit block;

f. a plurality of thin film capacitors formed on the silicon substrate;

g. a plurality of thin film inductors formed on the silicon substrate;

h. first interconnection means electrically interconnecting the capacitors and inductors to form a plurality of LC circuits;

j. interconnection means electrically connecting the LC circuits between selected high frequency RF integrated circuit chips.