Calculating method for inductance in a semiconductor integrated circuit

• US 20040075436A1
• Filed: 04/21/2003
• Published: 04/22/2004
• Est. Priority Date: 10/21/2002
• Status: Abandoned Application

• Current Assignee: Semiconductor Technology Academic Research Center
• Original Assignee: Semiconductor Technology Academic Research Center
• Inventors: Kurokawa, Atsushi, Masuda, Hiroo
• Application Number:
  US10/421,005
• Publication Number:
  US 20040075436A1
• Time in Patent Office: Days
• US Class Current: 324/318
• CPC Class Codes: G06F 30/367 Design verification, e.g. using simulation, simulation program with integrated circuit emphasis [SPICE], direct methods or relaxation methods
• CPC Class Codes: H01L 27/0207 Geometrical layout of the components, e.g. computer aided design; custom LSI, semi-custom LSI, standard cell technique

Abstract

There is disclosed a calculating method for an inductance in a semiconductor integrated circuit, comprising first recognizing connection of a wiring and structure of the wiring from a process structure and layout data of the wiring with respect to an object in a designated region. Next, the wiring is divided into a plurality of segments based on predetermined places to be divided and designated wiring length with respect to the connection and structure of the wiring. Next, a relation between the divided two segments is obtained. Next, an equation of a self inductance approximated with a geometric mean distance (GMD) of a wiring section is used to calculate partial self inductances of the respective segments based on the relation between the two segments. Moreover, an equation of a mutual inductance is used to calculate a partial mutual inductance between the two segments.

Claims

1. A calculating method for an inductance in a semiconductor integrated circuit, comprising:

a step of recognizing connection of a wiring and structure of the wiring from a process structure and layout data of the wiring with respect to an object in a designated region;

a step of dividing the wiring into a plurality of segments based on predetermined places to be divided and designated wiring length with respect to the recognized connection and structure of the wiring;

a step of obtaining a relation between the divided two segments; and

a step of calculating partial self inductances of the respective segments based on the obtained relation between the two segments using an equation of a self inductance approximated with a geometric mean distance (GMD) of a wiring section and calculating a partial mutual inductance between the two segments using an equation of a mutual inductance.

2. The calculating method according to claim 1, wherein the step of calculating the partial mutual inductance comprises:

regarding the wiring as a linear wiring whose section is infinitely small;

calculating the partial mutual inductance with respect to the wiring within a designated interval using an equation of an exact parallel wiring between linear conductors, when two linear wirings are in a mutually parallel relation;

calculating the partial mutual inductance using an exact equation of an oblique wiring between the linear conductors when an angle between two linear wirings is larger than 0 degree and smaller than 90 degrees; and

setting the partial mutual inductance to 0 to obtain the inductance, when the two linear wirings form 90 degrees.

3. The calculating method for the inductance according to claim 1, wherein the step of calculating the partial mutual inductance comprises:

regarding the wiring as a linear wiring whose section is infinitely small;

comparing data with data obtained beforehand by an electromagnetic analysis tool for each process or using a conventional structure to select an equation whose error is within a predetermined range from an exact equation between the linear wirings, a plurality of equations obtained by approximating the exact equation between the linear wirings with Taylor expansion, a plurality of equations derived by applying a geometric mean distance to the wiring which is a bunch of a plurality of linear wirings and whose section has a thickness of 0 and a finite width after the Taylor expansion of the exact equation between the linear wirings, and an equation in which the wiring section is exactly considered with respect to the wiring within a designated interval, based on structure parameters of the width, interval, and length of the wiring, when two linear wirings have a mutually parallel relation; and

next calculating the partial mutual inductance using an equation whose calculation cost is minimum from the selected equation.

4. The calculating method for the inductance according to claim 1, further comprising:

also obtaining the partial self inductance and the partial mutual inductance using an electromagnetic analysis tool, when the wiring has a wiring structure largely influenced by a skin effect and a proximity effect.

5. The calculating method for the inductance according to claim 1, further comprises:

obtaining a table of data obtained by an electromagnetic analysis tool beforehand and also obtaining the partial self inductance and the partial mutual inductance using the table, when the wiring has a wiring structure largely influenced by a skin effect and a proximity effect.

6. The calculating method for the inductance according to claim 1, further comprising:

obtaining a polynomial equation of data obtained by an electromagnetic analysis tool beforehand and also obtaining the partial self inductance and the partial mutual inductance using the polynomial equation, when the wiring has a wiring structure largely influenced by a skin effect and a proximity effect.

7. The calculating method for the inductance according to claim 1, further comprises:

obtaining the inductance using a power supply wiring and a ground wiring as objects whose inductances are calculated; and

excluding the other wirings.

8. The calculating method for the inductance according to claim 1, further comprising:

obtaining the inductance using a power supply wiring, a ground wiring, and a clock wiring, or a bus wiring as objects whose inductances are calculated; and

excluding the other wirings.

9. The calculating method for the inductance according to claim 1, further comprising:

obtaining the inductance using a power supply wiring, a ground wiring, and a signal wiring whose length is not less than a designated length as objects whose inductances are calculated; and

excluding the other wirings.

10. The calculating method for the inductance according to claim 1, further comprising:

a step of calculating a loop inductance using a power supply wiring whose current return path is dominant; and

a step of calculating delay from a resistance, the loop inductance, and a capacity to search a critical net influenced by the inductance.

11. The calculating method for the inductance according to claim 1, further comprising:

a step of constituting the segment by a π

-type or T-type equivalent circuit including the calculated partial self inductance and/or partial mutual inductance, a resistance, and a capacity; and

a step of removing a place whose partial self inductance or partial mutual inductance is small to perform a static or dynamic timing analysis.