Power amplification circuit and method for supplying power at a plurality of desired power output levels

• US 20040075494A1
• Filed: 10/17/2002
• Published: 04/22/2004
• Est. Priority Date: 10/17/2002
• Status: Active Grant

• Current Assignee: Google Technology Holdings LLC (Alphabet Inc.)
• Original Assignee: Motorola, Inc. (Motorola Solutions, Inc.)
• Inventors: Greene, Matthew, Conrad, Clark, Klomsdorf, Armin
• Granted Patent: US 6,794,935 B2
• Time in Patent Office: Days
• US Class Current: 330/129
• CPC Class Codes: H03F 1/0261 with control of the polarisation voltage or current, e.g. gliding Class A
• CPC Class Codes: H03F 1/0266 by using a signal derived from the input signal
• CPC Class Codes: H03F 1/56 Modifications of input or output impedances, not otherwise provided for
• CPC Class Codes: H03F 2200/321 Use of a microprocessor in an amplifier circuit or its control circuit
• CPC Class Codes: H03F 2200/387 A circuit being added at the output of an amplifier to adapt the output impedance of the amplifier
• CPC Class Codes: H03F 2200/405 the output amplifying stage of an amplifier comprising more than three power stages
• CPC Class Codes: H03G 3/3042 in modulators, frequency-changers, transmitters or power amplifiers transmission power control in bidirectional transmission systems H04W52/04

Abstract

The present invention provides a method and apparatus for supplying power to a load at a plurality of different power levels. The method includes changing between high and low power outputs of the power amplifier when amplifying a signal having a common modulation format. A different bias is applied to the power amplifier at the low power output than the bias applied to the power amplifier at the high power output. The output of the power amplifier is loaded with a different impedance at the low power output than the impedance loaded at the output of the power amplifier output at the high power output. In at least one embodiment, the power amplifier changes between high and low power outputs at a different threshold level dependant upon whether the power amplifier is transitioning from the high power output to the low power output, or whether the power amplifier is transitioning from the low power output to the high power output.

Claims

1. A method in a power amplifier, comprising:

changing between high and low power outputs of the power amplifier when amplifying a signal having a common modulation format;

applying a different bias to the power amplifier at the low power output than a bias applied to the power amplifier at the high power output;

loading an output of the power amplifier with a different impedance at the low power output than an impedance loaded at the output of the power amplifier output at the high power output.

2. The method of claim 1 wherein changing between high and low power outputs of the power amplifier occurs at a different threshold level dependant upon whether the power amplifier is transitioning from the high power output to the low power output, or whether the power amplifier is transitioning from the low power output to the high power output.

3. The method of claim 1 wherein the power amplifier linearly amplifies a received signal at both the high and low power outputs of the power amplifier.

4. The method of claim 1 wherein applying a different bias to the power amplifier includes applying a reduced bias to the power amplifier at the low power output relative to a bias applied at the high power output, and loading an output of the power amplifier with a different impedance includes applying an increased impedance at the low power output relative to the impedance applied at the high power output.

5. The method of claim 1 wherein applying a different bias to the power amplifier and loading an output of the power amplifier with a different impedance is based on the value of an input signal received by the power amplifier.

6. The method of claim 1 wherein the bias applied to the power amplifier and the impedance loaded to the power amplifier output is controlled by a control circuit of the power amplifier.

7. A method in a power amplifier having high and low power outputs in an operating range thereof, comprising:

changing between the high and low power outputs of the power amplifier;

applying a reduced bias to the power amplifier at the low power output relative to a bias applied thereto at the high power output;

applying an increased load to an output of the power amplifier when operating at the low power output relative to a load applied thereto when operating at the high power output.

8. The method of claim 7 wherein changing between high and low power outputs of the power amplifier occurs at a different threshold level dependant upon whether the power amplifier is transitioning from the high power output to the low power output, or whether the power amplifier is transitioning from the low power output to the high power output.

9. The method of claim 7 wherein changing between high and low power outputs of the power amplifier includes detecting the value of an input signal received by the power amplifier and changing between high and low power outputs of the power amplifier based on the detected value of the input signal received by the power amplifier.

10. A method in a power amplifier having high and low power outputs in an operating range thereof, comprising:

reducing power consumption of the power amplifier by applying a reduced bias to the power amplifier when operating at the low output power relative to a bias applied to the power amplifier at the high output power;

decreasing a level to which the bias may be reduced when operating at the low output power in the operating range of the power amplifier by increasing the impedance of a load applied to an output of the power amplifier when operating at the low output power relative to a load applied to the power amplifier output when operating at the high output power.

11. A power amplification circuit comprising:

a power amplifier having an output with high and low output power levels in an operating range of the power amplification circuit;

a variable bias circuit coupled to the power amplifier, the variable bias circuit having at least a first and second power amplifier bias configurations;

a variable impedance circuit coupled to the output of the power amplifier, the variable impedance circuit having at least a first and second power amplifier impedance configurations,

wherein the power amplifier is configured in a reduced bias configuration at the low output power level relative to the bias configuration of the power amplifier at the high output power level, and the power amplifier is loaded with an increased impedance at the low output power level relative to the loading of the power amplifier at the high output power level.

12. The power amplification circuit of claim 11 wherein the variable bias circuit has a bias control input coupled to an input of the power amplifier, and the variable impedance circuit has an impedance control input coupled to the input of the power amplifier.

13. The power amplification circuit of claim 11 further comprising a controller having a control output coupled to the variable bias circuit and to the variable impedance circuit, wherein the controller is adapted for configuring the variable bias circuit and the variable impedance circuit based on a desired power amplifier output signal.

14. The power amplification circuit of claim 13 wherein the variable impedance circuit comprises impedance elements coupled by a switch, and wherein the controller is adapted for configuring the variable impedance circuit by actuating the switch at different power amplifier output power levels depending on whether the power amplifier is switching from high to low output power levels or from low to high output power levels.

15. The power amplification circuit of claim 11 further comprises a hysteretic comparator for determining when the power amplifier transitions between low and high output power levels.

16. A power amplification circuit for supplying power to a load over an extended range including a set of a plurality of predefined desired power output levels, each desired power output level being a subset of the extended range, the power amplification circuit comprising:

a power amplifier including a first input for receiving a signal to be amplified, a second input for receiving a bias signal, and an output for producing an amplified signal;

a control circuit including a bias adjust circuit, and an impedance select circuit, for receiving a signal, which selects one of the desired output power levels, and for producing a bias adjust control signal and an impedance select control signal;

a variable impedance circuit, coupled to the output of the power amplifier and the impedance select circuit of the control circuit, the variable impedance circuit including a plurality of impedance states, which are separately selectable, each impedance state corresponding to at least one of the ranges of desired power output levels; and

a variable supply, coupled to the power amplifier and the bias adjust circuit of the control circuit, for receiving the bias adjust control signal and supplying an adjusted bias signal to the second input of the power amplifier.

17. The power amplification circuit of claim 16 wherein the variable impedance circuit includes one or more output impedance stages coupled to the output of the power amplifier, each output impedance stage including a load impedance network.

18. The power amplification circuit of claim 17 wherein the variable impedance circuit includes one or more impedances and one or more switches, each switch corresponding to one of the one or more impedances, which are selectively enabled for coupling the corresponding impedance to one of the one or more load impedance networks of the one or more output impedance stages.

19. The power amplification circuit of claim 18 wherein at least some of the one or more impedances include a capacitor, which is selectively coupled to one of the one or more load impedance networks.

20. The power amplification circuit of claim 18 wherein the switch includes a pin diode.

21. The power amplification circuit of claim 18 wherein the switch includes a transistor.

22. The power amplification circuit of claim 17 wherein each of the load impedance networks includes a base impedance.

23. The power amplification circuit of claim 22 wherein the base impedance includes a transmission line element.

24. The power amplification circuit of claim 18 wherein at least some of the one or more impedances and corresponding switches, when enabled, couple an additional impedance in parallel with other impedances already present in the load impedance network.

25. The power amplification circuit of claim 18 wherein at least some of the one or more impedances and corresponding switches, when enabled, couple an additional impedance in series with other impedances already present in the load impedance network.

26. The power amplification circuit of claim 16 wherein the power amplifier includes one or more amplifiers coupled in series, wherein the output of an immediately preceding amplifier is coupled to the input of any immediately subsequent amplifier.

27. The power amplification circuit of claim 26 wherein the output of an immediately preceding amplifier is coupled to the input of any immediately subsequent amplifier via an interstage match circuit.

28. The power amplification circuit of claim 27 wherein the interstage match circuit includes a load impedance network.

29. The power amplification circuit of claim 28 wherein the load impedance network is coupled to the impedance select control signal, and where the impedance value of the load impedance network of the interstage match circuit can be adjusted, based upon the impedance select control signal.

30. The power amplification circuit of claim 26 wherein the bias adjust circuit controls the level of the bias signals supplied to each of the one or more amplifiers.

31. The power amplification circuit of claim 16 wherein each of the predefined power output levels is a range of desired power output levels.

32. The power amplification circuit of claim 31 wherein portions of each of the desired power output level ranges overlap with portions of other desired output level ranges in the set of predefined power output levels.

33. The power amplification circuit of claim 32 wherein the control circuit includes a processor unit, coupled to the bias adjust circuit and the impedance select circuit, including

a processor;

a storage unit coupled to said processor for storing one or more sets of instructions for execution by the processor including

prestored instructions for receiving a new desired power output level and comparing the new desired power output level to the present selected range of desired power output level,

prestored instructions for selecting a new range of desired power output level, which includes the new desired power output level, if the present selected range of desired power output level does not include the new desired power output level, and

prestored instructions for producing an impedance select control signal for selecting the impedance of the variable impedance network and for producing a bias adjust control signal for adjusting the bias signal produced by the variable supply, which corresponds to the new selected range of desired power output level.

34. The power amplification circuit of claim 16 wherein the control circuit includes a processor unit, coupled to the bias adjust circuit and the impedance select circuit, including

a processor;

a storage unit coupled to said processor for storing one or more sets of instructions for execution by the processor including

prestored instructions for receiving a new desired power output level and comparing the new desired power output level to the present selected desired power output level,

prestored instructions for producing an impedance select control signal for selecting the impedance of the variable impedance network and for producing a bias adjust control signal for adjusting the bias signal produced by the variable supply, which corresponds to the new selected desired power output level, if the present selected desired power output level is not substantially equivalent to the new desired power output level.

35. The power amplification circuit of claim 16 wherein the power amplification circuit is used in a transmitter of a wireless communication device.

36. A method of supplying power to a load via a power amplification circuit over an extended range comprising:

defining a set of a plurality of desired power output levels, where each power output level is a subset of the extended range;

associating a bias signal supply level and an output impedance with each desired power output levels;

selecting a desired power output level;

adjusting the bias signal supply level, corresponding to the selected desired power output level;

selecting an output impedance, corresponding to the selected desired power output level;

receiving a signal to be amplified; and

amplifying the received signal.

37. The method of claim 36 wherein, when a new desired power output level is selected, if the new desired power level is higher than the previous desired power level, the bias current is increased and a smaller output impedance is selected, and if the new desired power level is lower than the previous desired power level, the bias current is decreased and a larger output impedance is selected.

38. The method of claim 36 wherein each defined desired power output level is a range of desired power output levels, corresponding to a subset of the extended range over which the power amplification circuit operates.

39. The method of claim 38 wherein defining a set of a plurality of desired power levels includes defining a plurality of ranges of desired power levels, where a portion of each of the plurality of ranges overlap with portions of other desired output level ranges.

40. The method of claim 39 further comprising:

selecting a new desired power output value;

comparing the new desired power output value to the present selected range of desired power output level; and

if the new desired power output value is not included within the present selected range of desired power output level, then selecting a new range of desired power output level, that includes the new desired power output value, and adjusting the bias signal supply level and selecting an output impedance, corresponding to the new selected range of desired power output level.

41. The method of claim 36 further comprising:

selecting a new desired power output value;

comparing the new desired power output value to the previously selected desired power output level; and

if the new desired power output value is not substantially equivalent to the previously selected power output level, then selecting a new desired power output level corresponding to the new desired power output value and adjusting the bias signal supply level and selecting an output impedance, corresponding to the new desired power output level.

42. The method of claim 36 wherein selecting an output impedance includes switching in and out individual impedances within an impedance network.

43. The method of claim 42 wherein switching in and out individual impedances within an impedance network includes switching in and out one or more individual impedances in parallel with an existing impedance present in the impedance network.

44. The method of claim 42 wherein switching in and out individual impedances within an impedance network includes switching in and out one or more individual impedances in series with an existing impedance present in the impedance network.

45. The method of claim 36 wherein adjusting the bias signal supply level includes adjusting the output level of a variable supply circuit.