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Logic verification system

  • US 20040078179A1
  • Filed: 10/09/2003
  • Published: 04/22/2004
  • Est. Priority Date: 10/17/2002
  • Status: Abandoned Application
First Claim
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1. A logic verification system utilizing the same FPGA module and the same configuration data in a couple of verification processes of logic emulation and logic simulation.

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