Hybrid implementation for error correction codes within a non-volatile memory system
First Claim
1. A method for storing data within a non-volatile memory of a memory system, the method comprising:
- identifying a first block into which the data is to be stored;
obtaining an indicator associated with the first block;
determining when the indicator indicates that the data is to be encoded using a first algorithm;
encoding the data using the first algorithm when it is determined that the data is to be encoded using the first algorithm; and
writing the data encoded using the first algorithm into the first block.
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Accused Products
Abstract
Methods and apparatus for using different error correction code algorithms to encode and to decode contents of blocks within a non-volatile memory are disclosed. According to one aspect of the present invention, a method for storing data within a non-volatile memory includes identifying a first block into which the data is to be stored, and obtaining an indicator associated with the first block. A determination may then be made regarding whether the indicator indicates that the data is to be encoded using a first algorithm. The data is encoded using the first algorithm when it is determined that the data is to be encoded using the first algorithm, after which point the data encoded using the first algorithm is written into the first block.
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Citations
46 Claims
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1. A method for storing data within a non-volatile memory of a memory system, the method comprising:
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identifying a first block into which the data is to be stored;
obtaining an indicator associated with the first block;
determining when the indicator indicates that the data is to be encoded using a first algorithm;
encoding the data using the first algorithm when it is determined that the data is to be encoded using the first algorithm; and
writing the data encoded using the first algorithm into the first block. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10)
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11. A method for reading data within a non-volatile memory of a memory system, the method comprising:
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identifying a first block from which data is to be read;
obtaining an indicator associated with the first block;
determining when the indicator indicates that the data stored in the first block has encoded using a first algorithm; and
decoding the data using the first algorithm when it is determined that the data has been encoded using the first algorithm. - View Dependent Claims (12, 13, 14, 15, 16, 17, 18, 19, 20)
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21. A memory system comprising:
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a non-volatile memory including a plurality of blocks, the plurality of blocks including a first block;
code devices for identifying the first block into which data is to be stored;
code devices for obtaining an indicator associated with the first block;
code devices for determining when the indicator indicates that the data is to be encoded using a first algorithm;
code devices for encoding the data using the first algorithm when it is determined that the data is to be encoded using the first algorithm;
code devices for writing the data encoded using the first algorithm into the first block; and
a memory area that stores the code devices. - View Dependent Claims (22, 23, 24, 25, 26, 27)
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28. A memory system comprising:
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a non-volatile memory including a plurality of blocks, the plurality of blocks including a first block, the first block including data;
code devices for identifying the first block;
code devices for obtaining an indicator associated with the first block;
code devices for determining when the indicator indicates that the data has been encoded using a first algorithm;
code devices for decoding the data using the first algorithm when it is determined that the data has been encoded using the first algorithm; and
a memory area that stores the code devices.
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30. The memory system of claim 29 further including:
code devices for decoding the data using a second algorithm when it is determined that the data has not been encoded using the first algorithm. - View Dependent Claims (31, 32, 33, 34)
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35. The memory system of claim 29 wherein the non-volatile memory is one of a NAND flash memory and an MLC NAND flash memory.
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36. A memory system comprising:
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a non-volatile memory including a plurality of blocks, the blocks including a first block and a second block, the first block including a first set of contents encoded using a first algorithm, the second block including a second set of contents encoded using a second algorithm, wherein the non-volatile memory further includes a data structure that is arranged to indicate that the first set of contents is encoded using the first algorithm and that the second set of contents is encoded using the second algorithm;
code devices for accessing the data structure, wherein the code devices for accessing the data structure include code devices for determining that the first set of contents is encoded using the first algorithm and code devices for determining that the second set of contents is encoded using the second algorithm; and
a memory area that stores the code devices. - View Dependent Claims (37, 38)
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39. A memory system comprising:
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a non-volatile memory that includes a first block into which data is to be stored;
means that identify the first block;
means that obtain an indicator associated with the first block;
means that determine when the indicator indicates that the data is to be encoded using a first algorithm; and
means that encode the data using the first algorithm when it is determined that the data is to be encoded using the first algorithm. - View Dependent Claims (40, 41, 42)
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43. A memory system comprising:
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a non-volatile memory that includes a first block from which data is to be read;
means that identify the first block;
means that obtain an indicator associated with the first block;
means that determine when the indicator indicates that the data stored in the first block has encoded using a first algorithm; and
means that decode the data using the first algorithm when it is determined that the data has been encoded using the first algorithm. - View Dependent Claims (44, 45, 46)
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Specification