Apparatus and method for reducing power consumption on simultaneous multi-threading systems

• US 20040083478A1
• Filed: 10/23/2002
• Published: 04/29/2004
• Est. Priority Date: 10/23/2002
• Status: Active Grant

• Current Assignee: Intel Corporation
• Original Assignee: Intel Corporation
• Inventors: Santos, Ishmael F., Chen, Yen-Kuang
• Granted Patent: US 7,653,906 B2
• Time in Patent Office: Days
• US Class Current: 718/107
• CPC Class Codes: G06F 1/3203 Power management, i.e. event-based initiation of a power-saving mode
• CPC Class Codes: G06F 1/329 by task scheduling
• CPC Class Codes: G06F 9/3851 from multiple instruction streams, e.g. multistreaming
• CPC Class Codes: Y02D 10/00 Energy efficient computing, e.g. low power processors, power management or thermal management

Abstract

Activites may be delayed from being dispatched until anther activity is ready to be dispatched. Dispatching more than one activities increase overlapping in execution time of activities. By delaying the dispatch of the activities, power consumption and thermal dissipation on a multi-threading processor may be reduced.

Claims

1. A method, comprising:

scheduling a first activity to run in a multi-threading system by delaying its dispatch.

2. The method of claim 1, wherein the first activity is delayed to wait for a second activity to be dispatched.

3. The method of claim 2, wherein the first activity and the second activity are dispatched together so that executions of the first activity and the second activity overlap.

4. The method of claim 3, wherein the first activity is associated with a first thread and the second activity is associated with a second thread.

5. The method of claim 1, further comprising:

dispatching the first activity after a predetermined period of delay.

6. The method of claim 1, further comprising:

dispatching the first activity if the first activity cannot be delayed.

7. The method of claim 1, further comprising:

determining if there is a third activity running and if so, dispatching the first activity so that executions of the first activity and the third activity overlap.

8. A method, comprising:

waiting for a second activity to be ready to be dispatched before dispatching a first activity even when the first activity is ready to be dispatched.

9. The method of claim 8, wherein when the second activity is ready to be dispatched, the first activity and the second activity are dispatched together.

10. The method of claim 8, wherein the first activity is dispatched after a predetermined period even when then second activity is not ready to be dispatched.

11. A method, comprising:

if a second activity is running then dispatching a first activity, else if a third activity is ready to be dispatched then dispatching both the first activity and the third activity, otherwise delaying the first activity from being dispatched.

12. The method of claim 11, wherein the first activity is delayed from being dispatched until the third activity is ready to be dispatched.

13. The method of claim 11, wherein the first activity is delayed until expiration of a predetermined delay period.

14. The method of claim 13, wherein upon said expiration the first activity is dispatched even when the third activity is not ready to be dispatched.

15. The method of claim 11, wherein the first activity is delayed based on priority.

16. A system, comprising:

a multi-threading processor that schedules activities by delaying dispatch of the activities.

17. The system of claim 16, wherein the multi-threading processor is a simultaneous multi-threading (SMT) processor.

18. The system of claim 17, wherein the SMT processor supports Hyper-Threading technology.

19. The system of claim 16, wherein the multi-threading processor delays the dispatch of the activities to increase execution overlaps.

20. The system of claim 16, wherein the multi-threading processor delays the dispatch of the activities for up to a predetermined period.

21. An apparatus, comprising:

a scheduler to schedule a first activity by delaying dispatch of the first activity.

22. The apparatus of claim 21, wherein the scheduler delays the dispatch of the first activity until a second activity is ready to be dispatched, and wherein the first activity and the second activity are dispatched together.

23. The apparatus of claim 21, wherein the scheduler delays the dispatch of the first activity for up to a predetermined period.

24. The apparatus of claim 21, wherein the scheduler delays the dispatch of the first activity unless a third activity is running.

25. A computer readable medium containing executable instructions which, when executed in a processing system, causes the processing system to perform a method comprising:

dispatching a first activity if a second activity is running, else dispatching the first activity and the second activity if the second activity is ready to be dispatched, otherwise delay dispatching the first activity.

26. The computer readable medium of claim 25, wherein the first activity is delayed until the second activity is ready to be dispatched.

27. The computer readable medium of claim 25, wherein the first activity is delayed until a predetermined delay period expires.

28. The computer readable medium of claim 25, wherein the first activity is delayed unless it cannot be delayed.