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Copper interconnect by immersion/electroless plating in dual damascene process

  • US 20040084320A1
  • Filed: 10/30/2002
  • Published: 05/06/2004
  • Est. Priority Date: 10/30/2002
  • Status: Abandoned Application
First Claim
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1. A copper electroplating method for fabrication of copper interconnect for integrated circuits, comprising:

  • providing silicon wafer as an active surface having a bottom metal layer;

    depositing a diffusion layers patterned to define areas having trenches and vias;

    connecting a negative terminal of a power supply to contact to the bottom metal layer of the wafer; and

    and copper electroplating said silicon wafer.

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