PACKAGE STRUCTURE AND METHOD FOR MAKING THE SAME
First Claim
1. A method of making a package structure, comprising the steps of:
- providing at least two substrates for composing the package structure;
making functional elements on at least one of the substrate;
assembling discrete elements, dies and devices onto at least one of the substrate;
forming part of electrical interconnection among the integrated elements and assembled discrete elements on one side or both sides of the said substrates;
making electrical conduction line and lead line on at least one of the substrate for further constructing electrical conduction and signal connection between two different substrates;
forming interposers, micro-joints and microstructures on a portion of surface of at least one of the substrate;
aligning and pre-bonding a substrate with the said interposers, micro-joints and microstructures to another substrate;
thereafter, the appropriate spacing provided by the corresponding said interposers, micro-joints and microstructures between the pre-bonded substrates, may accommodate and protect the integrated and hybrid assembled elements on the substrates;
forming a completely sealed interface between the pre-bonded interfaces of substrates by encapsulating the interfaces via through-hole microstructures, therefore a completely sealed package interface of each packaged devices or apparatus in the form of the said package is done and separating each packaged structures, devices or apparatus in the form of the said package;
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Accused Products
Abstract
A package structure and method for making devices of system-in-a-package (SiP). Substrates with integrated and assembled elements can be aligned and pre-bonded together, and fluidic encapsulating materials is applied to seal the rest opening of pre-bonded interface of substrates. Three dimensional and protruding microstructures, elements, and MEMS devices can be accommodated and protected inside a spatial space formed by the bonded substrates. By applying the technologies of flip-chip, chip-scale-packaging, and wafer-level-packaging in conjunction with present invention, then plural elements and devices can be packaged together and become a system device in wafer-level-system-in-a-package (WLSiP) format.
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Citations
67 Claims
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1. A method of making a package structure, comprising the steps of:
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providing at least two substrates for composing the package structure;
making functional elements on at least one of the substrate;
assembling discrete elements, dies and devices onto at least one of the substrate;
forming part of electrical interconnection among the integrated elements and assembled discrete elements on one side or both sides of the said substrates;
making electrical conduction line and lead line on at least one of the substrate for further constructing electrical conduction and signal connection between two different substrates;
forming interposers, micro-joints and microstructures on a portion of surface of at least one of the substrate;
aligning and pre-bonding a substrate with the said interposers, micro-joints and microstructures to another substrate;
thereafter, the appropriate spacing provided by the corresponding said interposers, micro-joints and microstructures between the pre-bonded substrates, may accommodate and protect the integrated and hybrid assembled elements on the substrates;
forming a completely sealed interface between the pre-bonded interfaces of substrates by encapsulating the interfaces via through-hole microstructures, therefore a completely sealed package interface of each packaged devices or apparatus in the form of the said package is done and separating each packaged structures, devices or apparatus in the form of the said package;
- View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28)
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29. A method of making a package structure, comprising the steps of:
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providing at least two substrates for composing the package structure;
making functional elements on at least one of the substrate;
fabricating alignment aiding microstructures assembling discrete elements, dies and devices onto at least one of the substrate;
forming part of electrical interconnection among the integrated elements and assembled discrete elements on one side or both sides of the said substrates;
making electrical conduction line and lead line on at least one of the substrate for further constructing electrical conduction and signal connection between two different substrates;
forming interposers, microjoints and microstructures on a portion of surface of at least one of the substrate aligning and pre-bonding a substrate with the said alignment aiding microstructures, interposers and micro-joints to another substrate;
the process of alignment and bonding are done with the aids of alignment aiding microstructures which are formed on specific locations on upper side of a lower-substrate and on relative locations on backside of another upper-substrate, where the bonding interface is formed by connecting the aforementioned upper side to backside of two substrates;
thus a substrate of a stack of two substrates having a pre-bonded interface is formed;
forming a completely sealed interface between the pre-bonded interfaces of substrates by encapsulating the interfaces via through-hole microstructures, therefore a completely sealed package interface of each packaged devices or apparatus in the form of the said package is done and separating each packaged structures, devices or apparatus in the form of the said package. - View Dependent Claims (30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58)
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59. A method for degassing a package structure with inner space and cavity forming a pre-bonded interface between substrates firstly, where the said pre-bonded substrates have through-hole microstructures for further encapsulating process;
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applying fluidic encapsulating materials to seal the said package structure through via holes;
curing the encapsulated said package structure before the fluidic encapsulating materials become hard, solid and stable inside a vacuum environment;
the gas inside the package structure will be de-bubble, degassed and extracted out of the inner space and cavity;
package is accomplished and separating each packaged structures, devices and apparatus in the form of the said package. - View Dependent Claims (60)
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61. A method for degassing a package structure with inner space and cavity forming a pre-bonded interface between substrates firstly, where the said pre-bonded substrates have through-hole microstructures for further encapsulating process and
applying fluidic encapsulating materials to seal the said package structure through via holes inside a vacuum environment; - curing the encapsulated said package structure before the fluidic encapsulating materials become hard, solid and stable inside a vacuum environment;
the gas inside the package structure will be de-bubble, degassed and extracted out of the inner space and cavity;
package is accomplished and separating each packaged structures, devices and apparatus in the form of the said package. - View Dependent Claims (62)
- curing the encapsulated said package structure before the fluidic encapsulating materials become hard, solid and stable inside a vacuum environment;
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63. The method for making package structure,
providing at least two substrates for composing the package structure; -
making functional elements on at least one of the substrate;
assembling discrete elements, dies and devices onto at least one of the substrate;
forming part of electrical interconnection among the integrated elements and assembled discrete elements on one side or both sides of the said substrates;
making electrical conduction line and lead line on at least one of the substrate for further constructing electrical conduction and signal connection between two different substrates;
forming interposers, micro-joints and microstructures on a portion of surface of at least one of the substrate;
aligning and pre-bonding a substrate with the said interposers, micro-joints and microstructures to another substrate;
thereafter, the appropriate spacing provided by the corresponding said interposers, micro-joints and microstructures between the pre-bonded substrates, may accommodate and protect the integrated and hybrid assembled elements on the substrates;
forming a completely sealed interface between the pre-bonded interfaces of substrates by applying fluidic encapsulating materials to seal the interfaces via through-hole microstructures, guiding the fluidic encapsulating materials inside the through-hole microstructures and package structures by making a difference of the internal and external pressure between the operating environment and the inner space of the said package structure;
Therefore, the flowability of the fluid encapsulating materials will become better, thus the space needed to be filled up are fulfilled perfectly and the encapsulating process will be finished faster;
therefore a completely sealed package interface of each packaged devices or apparatus in the form of the said package is done and separating each packaged structures, devices or apparatus in the form of the said package.
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64. The method for making package structure,
providing at least two substrates for composing the package structure; -
making functional elements on at least one of the substrate;
assembling discrete elements, dies and devices onto at least one of the substrate;
forming part of electrical interconnection among the integrated elements and assembled discrete elements on one side or both sides of the said substrates;
forming interposers, micro-joints and microstructures on a portion of surface of at least one of the substrate;
forming getter coating and adding getter materials on substrates;
where the said getter are absorber and collector for various gases, liquids or solids;
aligning and pre-bonding a substrate with the said interposers, micro-joints and microstructures to another substrate;
thereafter, the appropriate spacing provided by the corresponding said interposers, micro-joints and microstructures between the pre-bonded substrates, in order to accommodate and protect the integrated and hybrid assembled elements on the substrates;
forming a completely sealed interface between the pre-bonded interfaces of substrates by applying fluidic encapsulating materials to seal the interfaces via through-hole microstructures;
therefore a completely sealed package interface of each packaged devices or apparatus in the form of the said package is done and separating each packaged structures, devices or apparatus in the form of the said package.
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65. A method of making a package structure comprising:
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providing at least two wafers for composing the package structure;
making functional elements on at least one of the wafer;
assembling discrete elements, dies and devices onto at least one of the wafer;
forming part of electrical interconnection among the integrated elements and assembled discrete elements on one side or both sides of the said wafers;
making electrical conduction line and lead line on at least one of the wafer for further constructing electrical conduction and signal connection between two different wafers;
executing the wafer level testing for measurement of system level performance of the said system-in-a-package (SiP) are proceeded by using probes and probe card to contact the metal pads and conductive microstructures of the said package structures to form the electrical connection between the testing equipment and elements needed to be tested;
then signals and bias are applied to measure and test the said elements;
during the wafer level testing process, the assembled elements and devices of malfunction are identified and replaced;
forming interposers, micro-joints and microstructures on a portion of surface of at least one of the wafer;
aligning and pre-bonding a substrate with the said interposers, micro-joints and microstructures to another substrate;
thereafter, the appropriate spacing provided by the corresponding said interposers, micro-joints and microstructures between the pre-bonded substrates, in order to accommodate and protect the integrated and hybrid assembled elements on the substrates;
forming a completely sealed interface between the pre-bonded interfaces of substrates by encapsulating the interfaces via through-hole microstructures, therefore a completely sealed package interface of each packaged devices or apparatus in the form of the said package is done;
executing the wafer level testing to identify the good packaged structures and devices of the said system-in-a-package (SiP) format are proceeded by using probes and probe card to contact the metal pads and conductive microstructures of the said package structures to form the electrical connection between the testing equipment and elements needed to be tested;
then signals and bias are applied to measure and test the said elements andseparating each packaged structures, devices or apparatus in the form of the said package;
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66. A method of making a package structure comprising:
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providing at least two wafers for composing the package structure;
making functional elements on at least one of the wafer;
assembling discrete elements, dies and devices onto at least one of the wafer;
forming part of electrical interconnection among the integrated elements and assembled discrete elements on one side or both sides of the said wafers;
making electrical conduction line and lead line on at least one of the wafer for further constructing electrical conduction and signal connection between two different wafers;
executing the wafer level testing for measurement of system level performance of the said system-in-a-package (SiP) are proceeded by using probes and probe card to contact the metal pads and conductive microstructures of the said package structures to form the electrical connection between the testing equipment and elements needed to be tested;
then signals and bias are applied to measure and test the said elements;
during the wafer level testing process, the properties of the said passive elements and devices are trimmed to become better and precisely;
forming interposers, micro-joints and microstructures on a portion of surface of at least one of the wafer;
aligning and pre-bonding a substrate with the said interposers, micro-joints and microstructures to another substrate;
thereafter, the appropriate spacing provided by the corresponding said interposers, micro-joints and microstructures between the pre-bonded substrates, in order to accommodate and protect the integrated and hybrid assembled elements on the substrates;
forming a completely sealed interface between the pre-bonded interfaces of substrates by encapsulating the interfaces via through-hole microstructures, therefore a completely sealed package interface of each packaged devices or apparatus in the form of the said package is done;
executing the wafer level testing to identify the good packaged structures and devices of the said system-in-a-package (SiP) format are proceeded by using probes and probe card to contact the metal pads and conductive microstructures of the said package structures to form the electrical connection between the testing equipment and elements needed to be tested;
then signals and bias are applied to measure and test the said elements andseparating each packaged structures, devices or apparatus in the form of the said package;
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67. A method of making a package structure comprising:
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providing at least two wafers for composing the package structure;
making functional elements on at least one of the wafer;
assembling discrete elements, dies and devices onto at least one of the wafer;
forming part of electrical interconnection among the integrated elements and assembled discrete elements on one side or both sides of the said wafers;
making electrical conduction line and lead line on at least one of the wafer for further constructing electrical conduction and signal connection between two different wafers;
executing the wafer level testing for measurement of system level performance of the said system-in-a-package (SIP) are proceeded by using probes and probe card to contact the metal pads and conductive microstructures of the said package structures to form the electrical connection between the testing equipment and elements needed to be tested;
then signals and bias are applied to measure and test the said elements;
forming interposers, micro-joints and microstructures on a portion of surface of at least one of the wafer;
aligning and pre-bonding a substrate with the said interposers, micro-joints and microstructures to another substrate;
thereafter, the appropriate spacing provided by the corresponding said interposers, micro-joints and microstructures between the pre-bonded substrates, in order to accommodate and protect the integrated and hybrid assembled elements on the substrates;
forming a completely sealed interface between the pre-bonded interfaces of substrates by encapsulating the interfaces via through-hole microstructures, therefore a completely sealed package interface of each packaged devices or apparatus in the form of the said package is done;
executing the wafer level testing to identify the good packaged structures and devices of the said system-in-a-package (SiP) format are proceeded by using probes and probe card to contact the metal pads and conductive microstructures of the said package structures to form the electrical connection between the testing equipment and elements needed to be tested;
then signals and bias are applied to measure and test the said elements;
the said package structure are put into the environmental testing oven, and with the probes or wafer-level probe card for applying external signals and bias, in order to proceed the reliability testing, such as, aging treatment tests, and the burn-in process and separating each packaged structures, devices or apparatus in the form of the said package;
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Specification