Methods and systems for a storage system

• US 20040088393A1
• Filed: 10/31/2002
• Published: 05/06/2004
• Est. Priority Date: 10/31/2002
• Status: Active Grant

• Current Assignee: Mobile Networking Solutions, LLC (Dominion Harbor Enterprises, LLC)
• Original Assignee: Ring Technology Enterprises of Texas LLC (IPNav)
• Inventors: Bullen, Melvin James, Lynch, William Thomas, Dodd, Steven Louis, Herbison, David James
• Granted Patent: US 7,197,662 B2
• Time in Patent Office: Days
• US Class Current: 709/223
• CPC Class Codes: H04L 41/0663 Performing the actions predefined by failover planning, e.g. switching to standby network elements
• CPC Class Codes: H04L 41/0816 the condition being an adaptation, e.g. in response to network events
• CPC Class Codes: H04L 43/0811 by checking connectivity
• CPC Class Codes: H04L 67/1097 for distributed storage of data in networks, e.g. transport arrangements for network file system [NFS], storage area networks [SAN] or network attached storage [NAS]

Abstract

A storage system that may include one or more memory sections, one or more switches, and a management system. The memory sections include memory devices and a section controller capable of detecting faults with the memory section and transmitting messages to the management system regarding detected faults. The storage system may include a management system capable of receiving fault messages from the section controllers and removing from, service the faulty memory sections. Additionally, the management system may determine routing algorithms for the one or more switches.

Claims

1. A storage system, comprising:

one or more memory sections, including

one or more memory devices having storage locations for storing data, and

a memory section controller capable of detecting faults in the memory section and transmitting a fault message in response to the detected faults; and

one or more switches, including

one or more interfaces for connecting to one or more external devices; and

a switch fabric connected to one or more memory sections and the external device interfaces and interconnecting the memory sections and the external device interfaces based on an algorithm; and

a management system capable of receiving fault messages from the memory section controllers and removing from service the memory section from which the fault message was received, and wherein the management system is further capable of determining an algorithm for use by a switch fabric in interconnecting the memory sections and the external device interfaces, and instructing the switch to execute the determined algorithm.

2. The storage system of claim 1, wherein the switch further includes

one or more memory section interfaces for connecting the switch with the memory sections, such that the switch fabric is connected to the memory sections via the memory section interfaces;

a switch controller for receiving the instruction from the management system and executing the algorithm.

3. The storage system of claim 1, wherein the management system exercises direct control over the switch fabric and the external device interfaces.

4. The storage system of claim 2, wherein the management system is further capable of providing software images to the switch controllers and to the memory section controllers.

5. The storage system of claim 1, wherein an interface of the switch is connected to a non-volatile storage device, and wherein the management system is further capable of instructing the non-volatile storage device to load data into one or more of the memory sections via the switch.

6. The storage system of claim 5, wherein the management system is further capable of instructing the storage system to store a back-up of data stored by one or more of the memory sections into the non-volatile storage device.

7. The storage system of claim 6, wherein in the event the management system receives a fault message from a memory section, the management system instructs the non-volatile storage device to load the back-up of the faulty memory section'"'"'s data into a functioning memory section, and wherein the switch directs data requests regarding the faulty memory section'"'"'s data to the functioning memory section.

8. The storage system of claim 1, further including an interface for connecting to an external management system such that configuration management may be performed through the external management system.

9. The storage system of claim 1, wherein the storage locations of the memory devices are partitioned into data blocks, the data blocks identifiable by a data block identifier, and wherein a data request received by the storage system includes a data block identifier;

and wherein a switch receiving the data request directs the data request to a memory section storing the data block identified by the data block identifier; and

wherein the memory section reads data stored in the storage locations of the memory devices identified by the data block identifier and forwards the read data to a destination device via the switch.

10. The storage system of claim 1, wherein a plurality of parallel lines connect at least one of the memory sections to a switch, and wherein data from the memory section is passed through the switch fabric of the switch in parallel.

11. The storage system of claim 10, wherein the data passed through the switch fabric in parallel is synchronously passed through the switch fabric.

12. The storage system of claim 1, wherein a plurality of parallel lines connect at least one of the memory sections to a switch, further comprising:

one or more multiplexers for multiplexing the parallel lines.

13. The storage system of claim 12, wherein at least one multiplexer is included in one of the switches.

14. The storage system of claim 1, wherein the memory sections may be independently added or removed from the storage system.

15. The storage system of claim 1, wherein the management system is further capable of bringing into service memory sections added to the storage system.

16. The storage system of claim 1, further including:

one or more pipeline shift registers, including

one or more shift registers for receiving data stored in a memory device and outputting the data in response to receiving one or more clock signals.

17. The storage system of claim 1, wherein one or more memory sections includes a memory interface device for receiving, in response to the memory section receiving a data request, data from a memory device, and the memory interface device combines the requested data and an identifier for use in forwarding the requested data, the address being received by the memory interface device from the memory section controller.

18. The storage system of claim 17, wherein the identifier for use in forwarding the requested data is an address for a device to which the data are to be forwarded.

19. The storage system of claim 17, wherein the identifier for use in forwarding the requested data is an identifier for identifying the data that are to be forwarded.

20. The storage system of claim 17, wherein the data request received by the memory section is forwarded to the memory section controller which determines one or more addresses identifying storage locations in the memory devices responsive to the request and provides the addresses to the memory devices;

and wherein the memory devices provide the data in the storage locations identified by the addresses to the memory interface device.

21. The storage system of claim 17, wherein the memory devices include outputs, and wherein at least one of the memory interface devices includes:

at least one set of shift registers interconnected in series, wherein at least one of the shift registers receives a clock signal having a shift frequency, and wherein the shift register is capable of shifting data loaded into the shift register to a next one of the shift registers in the set according to shift frequency; and

wherein data from one or more of the outputs of a memory device is loaded into a corresponding shift register in the sets of shift registers and the loaded data is shifted from the shift register to a next one of the shift registers in the set according to the clock signal, such that the shift register maintains its shift frequency during any loading of the data.

22. The storage system of claim 17, wherein the memory devices include outputs, and wherein at least one of the memory interface devices includes:

at least one set of shift registers interconnected in series, wherein at least one of the shift registers receives a clock signal having a shift frequency, and wherein the shift register is capable of shifting data loaded into the shift register to a next one of the shift registers in the set according to the shift frequency; and

wherein data in the set of shifted registers is loaded according to the clock signal from one or more shift registers in the set into one or more of the memory devices via an input corresponding to the shift register, such that the shift register maintains its shift frequency during any loading of the data.

23. The storage system of claim 1, wherein the management system includes:

one or more control processors for determining and providing the algorithm to the switch; and

one or more administration processors for collecting statistical data from the one or more switches and the one or more memory sections.

24. The storage system of claim 1, wherein at least one memory section further includes

a temporary storage device for storing data to be written to a memory device;

and

a temporary storage interface device for storing data in and retrieving data from the temporary storage device;

wherein at least one of the switches is capable of, in response to receiving data to be stored in the memory section, forwarding the data to the temporary storage interface device, and wherein the temporary storage interface stores the data in the temporary storage device if a memory device to which the data is to be written is busy, and wherein the temporary storage interface device retrieves the data from the temporary storage device when the memory device is no longer busy and forwards the data to the memory device such that the memory device stores the data.

25. The storage system of claim 1, wherein at least one memory section further includes at least one communications channel interface for receiving data to be stored by the memory section and transferring the data to be stored to one or more of the memory devices, and wherein the communications channel interface is further capable of receiving data read from the memory devices and transferring the data read from the memory devices to one or more of the switches, and wherein the communications channel interface is further capable of receiving data requests and forwarding the data requests to the memory section controller.

26. A method for use in a storage system, comprising:

storing data in storage locations in a memory device, the memory device included in a memory section;

a management system determining an algorithm for use by a switch in connecting the memory section and an external device interface;

the management system instructing the switch to execute the determined algorithm;

the switch connecting the memory section to the external device interfaces based on the algorithm;

detecting by a memory section controller a fault in regard to the data stored in the memory device and transmitting a fault message in response to the detected fault to the management system;

receiving the fault message at the management system; and

the management system removing from service the memory section from which the fault message was received.

27. The method of claim 26, further comprising:

the management system providing a software image to the switch; and

the management system providing a software image to the memory section controller.

28. The method of claim 26, further comprising:

the management system instructing the non-volatile storage device to load data into a memory section via the switch; and

storing the data from the non-volatile storage device in a memory device in the memory section.

29. The method of claim 28, further comprising:

storing a back-up of data stored by the memory device into the nonvolatile storage device.

30. The method of claim 29, further comprising:

the management system instructing the non-volatile storage device to load the back-up of the faulty memory device'"'"'s data into a functioning memory device; and

the switch directing a data request regarding the faulty memory device'"'"'s data to the functioning memory device.

31. The method of claim 26, wherein the storage locations of the memory devices are partitioned into data blocks, the data blocks identifiable by a data block identifier, and wherein a data request received by the storage system includes a data block identifier, further comprising:

the switch directing the data request to a memory section including the memory device storing the data block identified by the data block identifier;

the memory section reading from the memory device data stored in the storage locations of the memory devices identified by the data block identifier; and

forwarding the read data to a destination device via the switch.

32. The method of claim 26, wherein a plurality of parallel lines connect the memory section to the switch, further comprising passing data from the memory section through the switch in parallel.

33. The method of claim 26, further comprising

connecting a new memory section to the switch while data is being read from the memory device;

and

disconnecting a memory section from the switch while data is being read from the memory device.

34. The method of claim 26, further comprising:

the management system bringing into service memory sections connected to the switch.

35. The method of claim 26, further comprising:

a memory interface device in the memory section receiving, in response to the memory section receiving a data request, data from a memory device;

the memory interface device receiving from the memory section controller an identifier for use in forwarding the requested data;

the memory interface device combining the requested data and the identifier, and

the memory interface device forwarding the combined data and identifier to a destination device.

36. The method of claim 35, further comprising:

forwarding to the memory section controller a data request;

the memory section controller determining one or more addresses identifying storage locations in the memory device responsive to the request;

the memory section controller providing the addresses to the memory devices; and

the memory device providing the data in the storage locations identified by the addresses to the memory interface device.

37. The method of claim 26, further comprising:

a memory interface device in the memory section receiving, in response to the memory section receiving a data request, data from the memory device;

shifting data in one or more shift registers in a set of shift registers interconnected in series from the shift register to a next one of the shift registers in the set on the basis of a clock signal having a shift frequency, wherein the shift registers are included in the memory interface device;

loading data from the memory device into a corresponding shift register in the set; and

shifting the data loaded into one or more of the shift registers to a next one of the shift registers in the set according to the shift frequency, wherein the shift registers maintains their shift frequency during the loading of the data from the memory devices into the shift registers.

38. The method of claim 26, further comprising:

a memory interface device in the memory section receiving, in response to the memory section receiving a data request, data from the memory device;

shifting data in one or more shift registers in a set of shift registers interconnected in series from the shift registers to a next one of the shift registers in the set on the basis of a clock signal having a shift frequency, the shift registers included in the memory interface device;

loading data from one or more of the shift registers to the memory device; and

shifting the data loaded from the one or more shift registers to a next one of the shift registers in the set according to the shift frequency after the data is loaded into the memory device, wherein the shift registers maintains their shift frequency during the loading of the data.

39. The method of claim 26, further comprising:

receiving data to be stored in the memory device;

forwarding the data to a temporary storage interface device;

the temporary storage device storing data to be stored in a temporary storage device if the memory device to which the data is to be written is busy;

the temporary storage interface device retrieving the data from the temporary storage device when the memory device to which the data is to be stored is no longer busy; and

the memory device storing the data.

40. A storage system, comprising:

means for storing, including

means for storing data in storage locations; and

means for detecting a fault in regard to the data stored by the means for storing and transmitting a fault message in response to the detected fault;

means for switching data being transmitted between the means for storing and external device interfaces; and

means for receiving the fault message, removing from service the means for storing from which the fault message was received, determining an algorithm for use by the means for switching in connecting the means for storing and the external device interfaces, and instructing the means for switching to execute the determined algorithm, such that the means for switching connects the means for storing to the one or more external device interfaces based on the algorithm.