Mold resin-sealed power semiconductor device having insulating resin layer fixed on bottom surface of heat sink and metal layer on the resin layer

• US 20040089928A1
• Filed: 04/15/2003
• Published: 05/13/2004
• Est. Priority Date: 11/11/2002
• Status: Active Grant

• Current Assignee: Mitsubishi Denki Kabushiki Kaisha (Mitsubishi Electric Corporation)
• Original Assignee: Mitsubishi Denki Kabushiki Kaisha (Mitsubishi Electric Corporation)
• Inventors: Nakajima, Dai, Hino, Yasunari, Tada, Kazuhiro, Shikano, Taketoshi
• Granted Patent: US 7,151,311 B2
• Time in Patent Office: Days
• US Class Current: 257/678
• CPC Class Codes: H01L 21/565 Moulds
• CPC Class Codes: H01L 2224/29099 Material
• CPC Class Codes: H01L 2224/29199 Material of the matrix
• CPC Class Codes: H01L 2224/2929 with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
• CPC Class Codes: H01L 2224/29299 Base material
• CPC Class Codes: H01L 2224/29386 with a principal constituent of the material being a non metallic, non metalloid inorganic material
• CPC Class Codes: H01L 2224/32014 the layer connector being smaller than the bonding area, e.g. bond pad
• CPC Class Codes: H01L 2224/32245 the item being metallic
• CPC Class Codes: H01L 2224/45015 being circular
• CPC Class Codes: H01L 2224/45124 Aluminium (Al) as principal constituent
• CPC Class Codes: H01L 2224/48091 Arched
• CPC Class Codes: H01L 2224/48247 connecting the wire to a bond pad of the item
• CPC Class Codes: H01L 2224/48472 the other connecting portion not on the bonding area also being a wedge bond, i.e. wedge-to-wedge
• CPC Class Codes: H01L 2224/73265 Layer and wire connectors
• CPC Class Codes: H01L 23/42 Fillings or auxiliary members in containers or encapsulations selected or arranged to facilitate heating or cooling
• CPC Class Codes: H01L 23/4334 Auxiliary members in encapsulations H01L23/49568 takes precedence
• CPC Class Codes: H01L 23/49537 Plurality of lead frames mounted in one device
• CPC Class Codes: H01L 23/49562 for devices being provided for in H01L29/00
• CPC Class Codes: H01L 24/28 Structure, shape, material or disposition of the layer connectors prior to the connecting process
• CPC Class Codes: H01L 24/29 of an individual layer connector
• CPC Class Codes: H01L 24/32 : of an individual layer connector
• CPC Class Codes: H01L 24/45 : of an individual wire connector
• CPC Class Codes: H01L 24/48 : of an individual wire connector
• CPC Class Codes: H01L 2924/00 : Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00012 : Relevant to the scope of the group, the symbol of which is combined with the symbol of this group
• CPC Class Codes: H01L 2924/00013 : Fully indexed content
• CPC Class Codes: H01L 2924/00014 : the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/01004 : Beryllium [Be]
• CPC Class Codes: H01L 2924/01005 : Boron [B]
• CPC Class Codes: H01L 2924/01006 : Carbon [C]
• CPC Class Codes: H01L 2924/01013 : Aluminum [Al]
• CPC Class Codes: H01L 2924/01014 : Silicon [Si]
• CPC Class Codes: H01L 2924/01015 : Phosphorus [P]
• CPC Class Codes: H01L 2924/01019 : Potassium [K]
• CPC Class Codes: H01L 2924/0102 : Calcium [Ca]
• CPC Class Codes: H01L 2924/01023 : Vanadium [V]
• CPC Class Codes: H01L 2924/01027 : Cobalt [Co]
• CPC Class Codes: H01L 2924/01029 : Copper [Cu]
• CPC Class Codes: H01L 2924/01033 : Arsenic [As]
• CPC Class Codes: H01L 2924/01039 : Yttrium [Y]
• CPC Class Codes: H01L 2924/0105 : Tin [Sn]
• CPC Class Codes: H01L 2924/01068 : Erbium [Er]
• CPC Class Codes: H01L 2924/01074 : Tungsten [W]
• CPC Class Codes: H01L 2924/01078 : Platinum [Pt]
• CPC Class Codes: H01L 2924/01082 : Lead [Pb]
• CPC Class Codes: H01L 2924/014 : Solder alloys
• CPC Class Codes: H01L 2924/0503 : 13th Group
• CPC Class Codes: H01L 2924/0665 : Epoxy resin
• CPC Class Codes: H01L 2924/1305 : Bipolar Junction Transistor [BJT]
• CPC Class Codes: H01L 2924/13055 : Insulated gate bipolar transistor [IGBT]
• CPC Class Codes: H01L 2924/1306 : Field-effect transistor [FET]
• CPC Class Codes: H01L 2924/13091 : Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]
• CPC Class Codes: H01L 2924/15787 : Ceramics, e.g. crystalline carbides, nitrides or oxides
• CPC Class Codes: H01L 2924/181 : Encapsulation
• CPC Class Codes: H01L 2924/2076 : equal to or larger than 100 microns
• CPC Class Codes: H01L 2924/351 : Thermal stress
• CPC Class Codes: H01L 2924/3512 : Cracking

Abstract

An insulating sheet consisting of a metal layer and an unhardened insulating resin layer is formed. The insulating resin layer contains a filler having grains of, e.g., scale-like shape and has thixotropy, and its outer size is larger than that of a bottom surface of a metal plate. The insulating sheet is disposed on a bottom surface of a cavity of a mold die and the metal plate is disposed on an upper surface of the insulating resin layer. On a main surface of the metal plate, a power semiconductor chip connected to a frame and another frame through a wire is mounted. The cavity is fully filled with a liquid mold resin in this state. After that, the insulating resin layer is hardened at the same timing as the hardening of the mold resin, and the insulating resin and the metal plate are fixed to each other. An interface between the insulating resin layer and the metal plate is included in the upper surface of the insulating resin layer.

Claims

1. A mold resin-sealed power semiconductor device, comprising:

a metal plate comprising a main surface, a bottom surface opposed to said main surface in a direction of its thickness and side surfaces sandwiched between said main surface and said bottom surface, said metal plate serving as a heat sink;

a first lead frame comprising a first inner lead portion which comprises a tip portion directly fixed onto a peripheral portion of said main surface of said metal plate and a first outer lead portion continuously connected to said first inner lead portion;

a second lead frame comprising a second inner lead portion which comprises a tip portion having an electrode and a second outer lead portion continuously connected to said second inner lead portion;

a power semiconductor chip comprising a lower surface having a conductive pattern fixed onto a center portion of said main surface of said metal plate with a conductive layer interposed therebetween, an upper surface opposed to said lower surface in a direction of its thickness, having an electrode pattern electrically connected to said electrode of said second inner lead portion through a metal wire and side surfaces sandwiched between said upper surface and said lower surface;

an insulating resin layer comprising an upper surface fixed onto said bottom surface of said metal plate, being in contact with said bottom surface, a lower surface opposed to said upper surface in a direction of its thickness and side surfaces sandwiched between said upper surface and said lower surface;

a metal layer comprising an upper surface fixed onto said lower surface of said insulating resin layer, being in contact with said lower surface, a lower surface opposed to said upper surface in a direction of its thickness with at least a portion thereof exposed outside, said portion of said lower surface being positioned immediately below an interface between said insulating resin layer and said metal plate and side surfaces sandwiched between said upper surface and said lower surface; and

a mold resin covering at least said first and second inner lead portions, said metal wire, said upper surface and said side surfaces of said power semiconductor chip, said conductive layer, and said main surface and said side surfaces of said metal plate, to form a package.

2. The mold resin-sealed power semiconductor device according to claim 1, wherein

the size of said upper surface of said insulating resin layer is larger than the size of said bottom surface of said metal plate,

said upper surface of said insulating resin layer entirely includes said interface between said insulating resin layer and said metal plate,

the size of said upper surface of said metal layer is equal to that of said lower surface of said insulating resin layer,

said mold resin fully covers only said first and second inner lead portions, said metal wire, said upper surface and said side surfaces of said power semiconductor chip, said conductive layer, said main surface and said side surfaces of said metal plate and an interface between a bottom surface of said package and said upper surface of said insulating resin layer,

said bottom surface of said metal plate is part of said bottom surface of said package, and

said side surfaces of said insulating resin layer and said side surfaces and said lower surface of said metal layer are entirely exposed outside.

3. The mold resin-sealed power semiconductor device according to claim 1, wherein

the size of said upper surface of said insulating resin layer is larger than the size of said bottom surface of said metal plate,

said upper surface of said insulating resin layer entirely includes said interface between said insulating resin layer and said metal plate,

the size of said upper surface of said metal layer is equal to that of said lower surface of said insulating resin layer,

said mold resin fully covers at least said first and second inner lead portions, said metal wire, said upper surface and said side surfaces of said power semiconductor chip, said conductive layer, said main surface and said side surfaces of said metal plate, an outer portion in said upper surface of said insulating resin layer which is positioned outside said interface between said insulating resin layer and said metal plate, said side surfaces of said insulating resin layer and said side surfaces of said metal layer, and

said portion which is exposed in said lower surface of said metal layer is part of a bottom surface of said package.

4. The mold resin-sealed power semiconductor device according to claim 3, wherein

said insulating resin layer comprises thixotropy which is a physical property to present no fluidity under a relatively low pressure and present fluidity under a relatively high pressure.

5. The mold resin-sealed power semiconductor device according to claim 4, wherein

said insulating resin layer comprises at least one kind of inorganic filler out of a scale-like inorganic filler, a needle-like inorganic filler and an inorganic filler having hyperfine grains whose outside diameter is 1 μ

m or less.

6. The mold resin-sealed power semiconductor device according to claim 3, wherein

said insulating resin layer comprises:

a first portion which is positioned under said interface between said insulating resin layer and said metal plate; and

a second portion which is positioned under said outer portion in said upper surface of said insulating resin layer said outer portion positioned outside said interface between said insulating resin layer and said metal plate, and

said first portion is thinner than said second portion.

7. The mold resin-sealed power semiconductor device according to claim 6, wherein

said second portion of said insulating resin layer and a peripheral portion of said metal layer which is fixed to said second portion are bent towards the inside of said mold resin, and

only a portion in said lower surface of said metal layer other than a bent lower surface portion included in said peripheral portion is exposed outside.

8. A method of manufacturing a mold resin-sealed power semiconductor device, comprising the steps of:

disposing an insulating sheet which is a complex of a metal layer and an unhardened insulating resin layer which is layered and fixed onto an upper surface of said metal layer in a predetermined position of a mold die, to bring a lower surface of said metal layer into surface-to-surface contact with a cavity bottom surface of said mold die;

disposing a metal plate serving as a heat sink, which comprises a main surface on which a power semiconductor chip is mounted and a bottom surface opposed to said main surface in a direction of its thickness, on a surface of said insulating sheet inside said mold die, to bring said bottom surface of said metal plate into surface-to-surface contact with an upper surface of said unhardened insulating resin layer;

implanting a mold resin in a cavity of said mold die while applying a pressure to said insulating sheet from said metal plate; and

hardening said mold resin and said unhardened insulating resin layer by stopping application of said pressure after said cavity is wholly filled with said mold resin.

9. The method of manufacturing a mold resin-sealed power semiconductor device according to claim 8, wherein

said pressure is temporarily increased to be higher than a mold resin implantation pressure immediately after said cavity is wholly filled and immediately before application of said pressure is stopped.