Power semiconductor devices having laterally extending base shielding regions that inhibit base reach-through and schottky rectifying flyback diodes

• US 20040099905A1
• Filed: 09/24/2003
• Published: 05/27/2004
• Est. Priority Date: 04/11/2001
• Status: Active Grant

• Current Assignee: Semiconductor Components Industries LLC (ON Semiconductor Corporation)
• Original Assignee: Silicon Semiconductor Corporation
• Inventors: Baliga, Bantval Jayant
• Granted Patent: US 6,800,897 B2
• Time in Patent Office: Days
• US Class Current: 257/328
• CPC Class Codes: H01L 29/0847 of field-effect transistors with insulated gate H01L29/0653 takes precedence; with a passive supplementary region between source or drain and substrate related to punch-through, capacity or isolation phenomena H01L29/1079; with LDD or DDD structure H01L29/7833; for thin film transistors H01L29/78618
• CPC Class Codes: H01L 29/0878 Impurity concentration or distribution
• CPC Class Codes: H01L 29/1095 Body region, i.e. base region, of DMOS transistors or IGBTs cell layout H01L29/0696
• CPC Class Codes: H01L 29/402 Field plates
• CPC Class Codes: H01L 29/407 Recessed field plates, e.g. trench field plates, buried field plates
• CPC Class Codes: H01L 29/41741 for vertical or pseudo-vertical devices
• CPC Class Codes: H01L 29/41766 with at least part of the source or drain electrode having contact below the semiconductor surface, e.g. the source or drain electrode formed at least partially in a groove or with inclusions of conductor inside the semiconductor H01L29/41733 - H01L29/41758 take precedence
• CPC Class Codes: H01L 29/66727 with a step of recessing the source electrode
• CPC Class Codes: H01L 29/7802 Vertical DMOS transistors, i.e. VDMOS transistors
• CPC Class Codes: H01L 29/7806 the other device being a Schottky barrier diode
• CPC Class Codes: H01L 29/872 Schottky diodes

Abstract

A power MOSFET includes a semiconductor substrate having a drift region therein and first and second transition regions of first conductivity type that extend between the drift region and a first surface of the semiconductor substrate. Each of the first and second transition regions has a vertically retrograded first conductivity type doping profile therein that peaks at a first depth relative to the first surface. First and second shielding regions of second conductivity type are provided in the drift region and define respective P-N junctions with the first transition region. The shielding regions extending laterally towards each other in a manner that constricts a neck of the first transition region to a minimum width at a second depth relative to the first surface. An anode electrode is provided. The anode electrode that extends on the first surface of the semiconductor substrate and defines a Schottky rectifying junction with the second transition region.

Claims

1. A vertical semiconductor device, comprising:

a semiconductor substrate having a drift region of first conductivity type therein and first and second transition regions of first conductivity type that extend between the drift region and a first surface of said semiconductor substrate, with each of the first and second transition regions having a vertically retrograded first conductivity type doping profile therein that peaks at a first depth relative to the first surface;

first and second shielding regions of second conductivity type that extend in the drift region and define respective P-N junctions with the first transition region, said first and second shielding regions extending laterally towards each other in a manner that constricts a neck of the first transition region to a minimum width at a second depth relative to the first surface; and

an anode electrode that extends on the first surface of said semiconductor substrate and defines a Schottky rectifying junction with the second transition region.

2. The device of claim 1, wherein a product of the peak first conductivity type dopant concentration in the second transition region and a width of the second transition region at the first depth is in a range between about 1×

10¹² cm<sup>−

2</sup> and about 7×

10¹² cm<sup>−

2</sup>.

3. The device of claim 1, wherein a product of the peak first conductivity type dopant concentration in the second transition region and a width of the second transition region at the first depth is in a range between about 3.5×

10¹² cm<sup>−

2</sup> and about 6.5×

10¹² cm<sup>−

2</sup>.

4. The device of claim 1, wherein said anode electrode ohmically contacts said first and second shielding regions.

5. A vertical power device, comprising:

a semiconductor substrate having a drift region of first conductivity type therein;

an insulated gate electrode that extends on a first surface of said semiconductor substrate;

a first base shielding region of second conductivity that extends in said semiconductor substrate and has a first lateral extent relative to a first end of said insulated gate electrode;

a first base region of second conductivity type that extends between said first base shielding region and the first surface and has a second lateral extent relative to the first end of said insulated gate electrode that is less than the first lateral extent;

a first source region of first conductivity type in said first base region;

a first transition region of first conductivity type that extends between the drift region and a portion of the first surface extending opposite said insulated gate electrode, forms rectifying junctions with said first base region and said first base shielding region and has a vertically retrograded first conductivity type doping profile therein;

a second transition region of first conductivity type that extends between the drift region and another portion of the first surface and has a vertically retrograded first conductivity type doping profile therein; and

a source electrode that is electrically coupled to said first source region, said first base region and said first base shielding region and forms a Schottky rectifying junction with said second transition region.

6. The device of claim 5, wherein said first base shielding region extends to at least a first depth relative to the first surface;

and wherein said first transition region has a peak first conductivity type dopant concentration therein at the first depth.

7. The device of claim 6, wherein said first transition region forms a non-rectifying junction with the drift region at a second depth relative to the first surface that is greater than the first depth;

and wherein said first base shielding region forms a P-N rectifying junction with the drift region at a third depth relative to the first surface that is greater than the second depth.

8. The device of claim 5, further comprising:

a second base shielding region of second conductivity that extends in said semiconductor substrate and has a third lateral extent relative to a second end of said insulated gate electrode;

a second base region of second conductivity type that extends between said second base shielding region and the first surface and has a fourth lateral extent relative to the second end of said insulated gate electrode that is less than the third lateral extent; and

a second source region of first conductivity type in said second base region.

9. The device of claim 8, wherein said first transition region is narrower between said first and second base shielding regions than it is between said first and second base regions.

10. The device of claim 8, wherein said first transition region extends between said first and second base regions and between said first and second base shielding regions;

wherein said first transition region has a peak first conductivity type dopant concentration therein at a first depth relative to the surface; and

wherein a product of the peak first conductivity type dopant concentration in said first transition region and a width of said first transition region at the first depth is in a range between about 1×

10¹² cm<sup>−

2</sup> and about 7×

10¹² cm<sup>−

2</sup>.

11. The device of claim 8, wherein said first transition region extends between said first and second base regions and between said first and second base shielding regions;

wherein said first transition region has a peak first conductivity type dopant concentration therein at a first depth relative to the surface; and

wherein a product of the peak first conductivity type dopant concentration in said first transition region and a width of said first transition region at the first depth is in a range between about 3.5×

10¹² cm<sup>−

2</sup> and about 6.5×

10¹² cm<sup>−

2</sup>.

12. A vertical power device, comprising:

a semiconductor substrate having a drift region of first conductivity type therein and first and second transition regions of first conductivity type that extend between the drift region and a first surface of said semiconductor substrate, with each of the first and second transition regions having a vertically retrograded first conductivity type doping profile therein that peaks at a first depth relative to the first surface;

an insulated gate electrode that extends on the first surface and has first and second opposing ends;

first and second base regions of second conductivity type that are selfaligned to the first and second ends of said insulated gate electrode, respectively, and form respective P-N junctions with opposing sides of an upper portion of the first transition region extending adjacent the first surface;

first and second source regions of first conductivity type in said first and second base regions, respectively;

first and second base shielding regions of second conductivity type that are more highly doped than said first and second base regions and extend laterally towards each other in said semiconductor substrate to thereby constrict a neck of the upper portion of the first transition region to a minimum width at a second depth relative to the first surface; and

a source electrode that ohmically contacts said first and second source regions and defines a Schottky rectifying junction with the second transition region.

13. The device of claim 12, wherein a product of a peak first conductivity type dopant concentration in the second transition region and a width of the second transition region at the first depth is in a range between about 1×

10¹² cm<sup>−

2</sup> and about 7×

10¹² cm<sup>−

2</sup>.

14. The device of claim 12, wherein a product of a peak first conductivity type dopant concentration in the second transition region and a width of the second transition region at the first depth is in a range between about 3.5×

10¹² cm<sup>−

2</sup> and about 6.5×

10<sup>−

12</sup> cm².

15. The device of claim 12, wherein said first and second base shielding regions are self-aligned to the first and second opposing ends of said insulated gate electrode.

16. The device of claim 15, wherein a product of a peak first conductivity type dopant concentration in the first transition region and a width of the first transition region at the second depth is in a range between about 1×

10¹² cm<sup>−

2</sup> and about 7×

10¹² cm<sup>−

2</sup>.

17. The device of claim 15, wherein a product of a peak first conductivity type dopant concentration in the first transition region and a width of the first transition region at the second depth is in a range between about 3.5×

10¹² cm<sup>−

2</sup> and about 6.5×

10¹² cm<sup>−

2</sup>.

18. A vertical power device, comprising:

a semiconductor substrate having a drift region of first conductivity type therein and first and second transition regions of first conductivity type that extend between the drift region and a first surface of said semiconductor substrate, with each of the first and second transition regions having a vertical doping profile therein that peaks at a first depth relative to the first surface;

an insulated gate electrode that extends on the first surface and has first and second opposing ends;

first and second base regions of second conductivity type that are selfaligned to the first and second ends of said insulated gate electrode, respectively, and form respective P-N junctions with opposing sides of an upper portion of the first transition region extending adjacent the first surface;

first and second source regions of first conductivity type in said first and second base regions, respectively;

first and second base shielding regions of second conductivity type that are more highly doped than said first and second base regions and extend laterally towards each other in said semiconductor substrate to thereby constrict a neck of the upper portion of the first transition region to a minimum width at about the first depth relative to the first surface; and

a source electrode that ohmically contacts said first and second source regions and defines a Schottky rectifying junction with the second transition region.

19. The device of claim 18, wherein said first and second base shielding regions are self-aligned to the first and second ends of said insulated gate electrode, respectively.

20. The device of claim 18, wherein said insulated gate electrode, said first source region, said first base region and the first transition region collectively define a first lateral enhancement mode MOSFET having a channel length of less than about 0.25 microns.

21. The device of claim 20, wherein said insulated gate electrode, said second source region, said second base region and the first transition region collectively define a second lateral enhancement mode MOSFET having a channel length of less than about 0.25 microns.

22. The device of claim 21, wherein during forward on-state conduction, the first and second lateral enhancement mode MOSFETs supply majority carriers of first conductivity type that pass vertically through the constricted neck of the first transition region.

23. A vertical power device, comprising:

a semiconductor substrate having a drift region of first conductivity type therein and first and second transition regions of first conductivity type that extend between the drift region and a first surface of said semiconductor substrate, with each of the first and second transition regions having a vertical doping profile that peaks at a first depth relative to the first surface;

an insulated gate electrode that extends on a portion of the first surface located opposite an upper portion of the first transition region;

first and second regions of second conductivity type that are self-aligned to first and second opposing ends of said insulated gate electrode, respectively, form respective P-N junctions with opposing sides of the first transition region and constrict a neck of the upper portion of the first transition region to a minimum width at a second depth relative to the first surface that is greater than about 0.25 microns;

first and second source regions of first conductivity type in said first and second regions of second conductivity type, respectively; and

a source electrode that ohmically contacts said first and second source regions and defines a Schottky rectifying junction with the second transition region.

24. The device of claim 23, wherein the first depth is about equal to the second depth.

25. The device of claim 23, wherein a product of the peak first conductivity type dopant concentration in the second transition region and a width of the second transition region at the first depth is in a range between about 1×

10¹² cm<sup>−

2</sup> and about 7×

10¹² cm<sup>−

2</sup>.

26. A vertical power device, comprising:

a semiconductor substrate having a drift region of first conductivity type therein and first and second transition regions of first conductivity type that extend between the drift region and a first surface of said semiconductor substrate;

an insulated gate electrode that extends on a portion of the first surface located opposite an upper portion of the first transition region;

first and second regions of second conductivity type that are selfaligned to first and second opposing ends of said insulated gate electrode, respectively, form respective P-N junctions with opposing sides of said transition region and constrict a neck of the upper portion of the first transition region to a minimum width at a first depth relative to the first surface that is greater than about 0.25 microns;

first and second source regions of first conductivity type in said first and second regions of second conductivity type, respectively; and

a source electrode that ohmically contacts said first and second source regions and defines a Schottky rectifying junction with the second transition region.

27. The device of claim 26, wherein a product of a first conductivity type dopant concentration in the second transition region at the first depth and a width of the second transition region at the first depth is in a range between about 1×

10¹² cm<sup>−

2</sup> and about 7×

10¹² cm<sup>−

2</sup>.

28. A semiconductor device, comprising:

a semiconductor substrate having a drift region of first conductivity type therein and transition region of first conductivity type that extends between the drift region and a first surface of said semiconductor substrate and has a vertically retrograded first conductivity type doping profile therein that peaks at a first depth relative to the first surface;

first and second shielding regions of second conductivity type that extend in the drift region and define respective P-N junctions with the towards each other in a manner that constricts a neck of the transition region to a minimum width at a second depth relative to the first surface; and

an anode electrode that extends on the first surface of said semiconductor substrate and defines a Schottky rectifying junction with the transition region.

29. The device of claim 28, wherein a product of the peak first conductivity type dopant concentration in the transition region and a width of the transition region at the first depth is in a range between about 1×

10¹² cm<sup>−

2</sup> and about 7×

10¹² cm<sup>−

2</sup>.

30. The device of claim 28, wherein a product of the peak first conductivity type dopant concentration in the transition region and a width of the transition region at the first depth is in a range between about 3.5×

10¹² cm<sup>−

2</sup> and about 6.5×

10¹² cm<sup>−

2</sup>.