Constant voltage power supply

• US 20040104712A1
• Filed: 11/24/2003
• Published: 06/03/2004
• Est. Priority Date: 11/25/2002
• Status: Active Grant

• Current Assignee: Asahi Kasei Toko Power Device Corp. (Asahi Kasei Corporation)
• Original Assignee: TOKO Incorporated (Murata Manufacturing Co Limited)
• Inventors: Tanigawa, Hiroshi, Yamane, Satoru
• Granted Patent: US 6,927,559 B2
• Time in Patent Office: Days
• US Class Current: 323/280
• CPC Class Codes: G05F 1/575 characterised by the feedback circuit

Abstract

Disclosed is a constant voltage power supply, which comprises an error amplifier VEA including a transistor M3, and a transistor M4 having the same ratio between channel width and channel length as that of the transistor M3. The gate and source of the transistor M4 are connected to the gate of a transistor M3 to form a current mirror circuit in conjunction with the transistor M3. Further, the drain of the transistor M4 is connected with a transistor M5 adapted to be switched in response to an external control signal Sg. For example, when the transistor M5 is in ON state, any signal amplification function of the transistor M3 is vanished away, and the gain of the error amplifier VEA is lowered. The circuit configuration for changing the gain of the error amplifier VEA makes it possible to strike a balance between high-speed response characteristic in an active mode and operational stability in a sleep mode, and reduce a circuit area required for being formed on an integrated circuit.

Claims

1. A constant voltage power supply including a series control transistor connected between of input and output terminals of said constant voltage power supply, and an error amplifier circuit having an output terminal connected to a control terminal of said series control transistor, wherein the operation of said series control transistor is controlled in accordance with an output voltage signal supplied to one input terminal of said error amplifier circuit from said series control transistor, and a reference voltage signal supplied to another input terminal of said error amplifier circuit, so as to provide an stabilized output voltage, said constant voltage power supply comprising:

a first amplifier circuit including first and second transistors, wherein one ends of the respective main current paths of said first and second transistors are connected to a common node to allow said first and second transistors to be formed as a differential pair;

a second amplifier circuit including a third transistor which has an control terminal adapted to be supplied with a signal appearing at the other end of the main current path of said second transistor;

a fourth transistor having an control terminal and an main current path, wherein said control terminal and one end of said main current path are connected to said control terminal of said third transistor to provide a current mirror circuit in conjunction with said third transistor; and

a first switch connected in series to the other end of the main current path of said fourth transistor and adapted to be switched in response to an external control signal.

2. The constant voltage power supply as defined in claim 1, wherein said third transistor has the ratio between the channel width and the channel length thereof, equal to that of said fourth transistor.

3. The constant voltage power supply as defined in claim 1 or 2, which further includes:

first and second active load elements connected to the other ends of the main current paths of said first and second transistors, respectively; and

a second switch adapted to be switched in response to said external control signal, wherein when said second switch is in its on-state, it is operable to short-circuit between both terminals of said first active element and cut off said second active load element.

4. The constant voltage power supply as defined in claim 3, wherein said external control signal represents either one of a first state when a load is in a sleep mode, and a second state when a load is in an active mode, wherein said first and second switches are adapted to be switched into their ON state in response to said external control signal representing said first state, and to be switched into their OFF state in response to said external control signal representing said second state.