Apparatus, methods and articles of manufacture for multiband signal processing

• US 20040104768A1
• Filed: 12/02/2002
• Published: 06/03/2004
• Est. Priority Date: 12/02/2002
• Status: Active Grant

• Current Assignee: Pine Valley Investments, Inc. (L3Harris Technologies, Inc.)
• Original Assignee: M/A-Com Eurotec, M/A Com, Inc. (MACOM Technology Solutions Holdings, Inc.)
• Inventors: Heaney, Eugene, Grebennikov, Andrei V., McGrath, Finbarr J., Nagle, Pierce J.
• Granted Patent: US 7,187,231 B2
• Time in Patent Office: Days
• US Class Current: 330/51
• CPC Class Codes: H03F 1/0277 Selecting one or more amplifiers from a plurality of amplifiers

Abstract

Apparatus, methods and articles of manufacture for multiband transmitter power amplification are provided wherein one or more amplifying devices, of which at least one may be one or more current sources, have impedances matched for different input and output frequencies by way of various impedance matching circuits.

Claims

1. A method for amplification or attenuation comprising:

providing an input signal;

providing at least a first non-linear current source and at least a second non-linear current source;

matching impedance of said first and second non-linear current sources, upon provision of said input signal thereto, through an input impedance matching circuit;

combining any current generated by said first and second non-linear current sources, in order to generate linear amplification or attenuation of said input signal.

2. The method of claim 1 wherein the input signal further comprises a phase characteristic of an input wave.

3. A method for amplification or attenuation comprising:

providing an input signal of a first bandwidth;

providing an input signal of a second bandwidth;

providing an input impedance matching circuit;

providing a first amplifying device;

providing an interstage impedance matching circuit;

providing a second amplifying device;

wherein, when said input signal of first bandwidth or said input signal of second bandwidth passes to said input impedance matching circuit, said circuit matches impedance with said first amplifying device, and when said input signal of first bandwidth or said input signal of second bandwidth passes to said second amplifying device, said interstage impedance matching circuit matches impedance with said second amplifying device.

4. A method as in claim 3 further comprising matching impedance upon output from said second amplifying device, via an output impedance matching circuit.

5. The method of claim 3 wherein the input signal further comprises a phase characteristic of an input wave.

6. A method of amplification comprising:

providing a plurality of amplifying devices;

providing one or more interstage impedance matching circuits each positioned between two of the plurality of amplifying devices;

providing an output impedance matching circuit through which a signal from a last of the plurality of amplifying devices passes; and

providing a band diplexer for connection of the last of the plurality of amplifying devices to a load.

7. The method of claim 6 wherein at least one of said one or more interstage impedance matching circuits further comprises an RLC circuit.

8. The method of claim 6 wherein said output impedance matching circuit further comprises a parallel-circuit load network.

9. The method of claim 6 wherein said output impedance matching circuit further comprises a switching output impedance matching circuit.

10. The method of claim 6 wherein at least one of said at least one of the plurality of amplifying devices is a field effect transistor.

11. The method of claim 6 wherein at least one of said at least one of the plurality of amplifying devices is a bipolar transistor.

12. The method of claim 6 further comprising generating an output power.

13. The method of claim 6 further comprising generating an output power that is substantially the same for a plurality of operating frequencies.

14. The method of claim 6 further comprising simultaneously matching impedances at different frequencies of said input signal.

15. An apparatus for amplification or attenuation comprising:

at least a first non-linear current source and at least a second non-linear current source;

an input impedance matching circuit for matching impedance of said first and second non-linear current sources, upon provision of an input signal thereto;

wherein any current generated by said first and second non-linear current sources, is combined in order to generate linear amplification or attenuation of said input signal.

16. The apparatus of claim 15 wherein the input signal further comprises a phase characteristic of an input wave.

17. An apparatus for amplification or attenuation comprising:

means for providing an input signal of a first bandwidth;

means for providing an input signal of a second bandwidth;

an input impedance matching circuit;

a first amplifying device;

an interstage impedance matching circuit;

a second amplifying device;

wherein, when said input signal of first bandwidth or said input signal of second bandwidth passes to said input impedance matching circuit, said circuit matches impedance with said first amplifying device, and when said input signal of first bandwidth or said input signal of second bandwidth passes to said second amplifying device, said interstage impedance matching circuit matches impedance with said second amplifying device.

18. The apparatus of claim 17 wherein impedances are matched upon output from said second amplifying device, via an output impedance matching circuit.

19. The apparatus of claim 17 wherein the input signal further comprises a phase characteristic of an input wave.

20. An apparatus for amplification or attenuation comprising:

a plurality of amplifying devices;

one or more interstage impedance matching circuits each positioned between two of the plurality of amplifying devices;

an output impedance matching circuit through which a signal from a last of the plurality of amplifying devices passes; and

a band diplexer for connection of the last of the plurality of amplifying devices to a load.

21. The apparatus of claim 20 wherein at least one of said one or more interstage impedance matching circuits further comprises an RLC circuit.

22. The apparatus of claim 20 wherein said output impedance matching circuit further comprises a parallel-circuit load network.

23. The apparatus of claim 20 wherein said output impedance matching circuit further comprises a switching output impedance matching circuit.

24. The apparatus of claim 20 wherein at least one of said at least one of the plurality of amplifying devices is a field effect transistor.

25. The apparatus of claim 20 wherein at least one of said at least one of the plurality of amplifying devices is a bipolar transistor.

26. The apparatus of claim 20 further comprising generating an output power via said last of the plurality of amplifying devices for input to said band diplexer.

27. The apparatus of claim 20 further comprising generating an output power via said last of the plurality of amplifying devices that is substantially the same for a plurality of operating frequencies for input to said band diplexer.

28. The apparatus of claim 20 wherein said one or more interstage impedance matching circuits each positioned between two of the plurality of amplifying devices;

and said output impedance matching circuit simultaneously match impedances at different frequencies of said input signal.

29. An integrated circuit for electromagnetic processing comprising:

a plurality of amplifying devices;

one or more interstage impedance matching circuits each positioned between two of the plurality of amplifying devices.