Amplifier assembly including variable gain amplifier, parallel programmable amplifiers, and AGC

• US 20040105033A1
• Filed: 01/30/2003
• Published: 06/03/2004
• Est. Priority Date: 12/02/2002
• Status: Active Grant

• Current Assignee: Avago Technologies International Sales Pte Limited (Broadcom, Inc.)
• Original Assignee: Broadcom Corporation (Broadcom, Inc.)
• Inventors: Burns, Lawrence M., Dauphinee, Leonard
• Granted Patent: US 7,471,941 B2
• Time in Patent Office: Days
• US Class Current: 348/678
• CPC Class Codes: G01R 31/31723 Hardware for routing the test signal within the device under test to the circuits to be tested, e.g. multiplexer for multiple core testing, accessing internal nodes routing the test signal to or from the device under test G01R31/31926
• CPC Class Codes: H01L 22/20 Sequence of activities consisting of a plurality of measurements, corrections, marking or sorting steps
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
• CPC Class Codes: H03F 3/211 using a combination of several amplifiers H03F3/60 takes precedence
• CPC Class Codes: H03G 3/3036 in high-frequency amplifiers or in frequency-changers H03G3/3052, H03G3/32, H03G3/34 take precedence
• CPC Class Codes: H04N 5/4446 IF amplifier circuits specially adapted for B&W TV RF amplifiers in general H03F3/189
• CPC Class Codes: H04N 5/52 Automatic gain control
• CPC Class Codes: H04N 7/102 Circuits therefor, e.g. noise reducers, equalisers, amplifiers H04N7/108 takes precedence

Abstract

An amplifier assembly receives an input signal including multiple frequency channels. A first stage amplifier amplifies the input signal, to produce at an output thereof an amplified first signal including the multiple frequency channels. A plurality of second stage amplifiers have their respective inputs coupled to an output of the first stage amplifier. Each second stage amplifier amplifies the amplified first signal, to produce at its respective output a respective second amplified signal including the multiple frequency channels. The first stage amplifier and the second stage amplifiers are variable gain amplifiers, and are constructed on a common Integrated Circuit (IC) substrate.

Claims

1. An amplifier assembly configured to receive an input signal including multiple frequency channels, comprising:

a first stage amplifier configured to amplify the input signal, to thereby produce at an output of the first stage amplifier an amplified first signal including the multiple frequency channels; and

a plurality of second stage amplifiers having their respective inputs coupled to an output of the first stage amplifier, each second stage amplifier being configured to amplify the amplified first signal, to thereby produce at its respective output a respective second amplified signal including the multiple frequency channels.

2. The amplifier assembly of claim 1, wherein the first stage amplifier is a first stage Variable Gain Amplifier (VGA) configured to have a gain controlled in response to one or more gain control signals.

3. The amplifier assembly of claim 1, further comprising:

an Automatic Gain Control (AGC) module configured to generate the one or more gain control signals responsive to a power of the first amplified signal.

4. The amplifier assembly of claim 3, wherein the first stage VGA includes a plurality of variable gain stages arranged in parallel with one another, each of the gain stages having a gain controlled responsive to a corresponding one of the one or more gain control signals.

5. The amplifier assembly of claim 3, wherein the AGC module is configured to generate the one or more AGC control signals according to a ramp function, and thereby change the gain of the first stage VGA according to the ramp function.

6. The amplifier assembly of claim 5, wherein the gain change of the first stage VGA is smooth and continuous responsive to the ramp function.

7. The amplifier assembly of claim 3, wherein an input of the AGC module is coupled to an output of one of the second stage amplifiers.

8. The amplifier assembly of claim 1, wherein each second stage amplifier is a second stage VGA.

9. The amplifier assembly of claim 8, wherein:

each of a first sub-plurality of the second stage Variable Gain Amplifiers (VGAs) has a first gain; and

each of a second sub-plurality of the second stage VGAs has a second gain that is less than the programmed first gain.

10. The amplifier assembly of claim 9, wherein a ratio of the first gain to the second gain is in a range of ratios of 1:

1 to 2;

1.

11. The amplifier assembly of claim 1, wherein the input signal is a TV signal including multiple TV channels.

12. The amplifier assembly of claim 1, wherein the input signal is at least one of an NTSC TV signal, a PAL TV signal, a SECAM TV signal, a digital data signal, and a digital TV signal.

13. The amplifier assembly of claim 1, wherein the first stage amplifier is a differential amplifier.

14. The amplifier assembly of claim 1, wherein each of the second stage amplifiers is a differential amplifier.

15. The amplifier assembly of claim 1, wherein the first stage amplifier includes a plurality of gain stages arranged in parallel with each other, and having their respective outputs combined together at the first stage amplifier output.

16. The amplifier assembly of claim 1, wherein the first stage amplifier includes:

an input node;

a first plurality of amplifiers having their inputs coupled to the input node;

an attenuation ladder coupled to the input node; and

a second plurality of amplifiers having their respective inputs coupled to successive corresponding taps of the attenuation ladder, wherein the outputs of the first plurality of amplifiers and the outputs of the second plurality of amplifiers are combined together at the output of the first stage amplifier.

17. The amplifier assembly of claim 16, further comprising:

an integrated circuit (IC) substrate, the first stage amplifier being constructed on the IC substrate; and

an input resistor external to the IC substrate and coupled to the input node, wherein the input resistor and the attenuation ladder together set an input impedance of the amplifier assembly.

18. The amplifier assembly of claim 1, further comprising:

a control interface coupled to the first stage amplifier and each of the second stage amplifiers, the control interface being configured to perform at least one of the following;

set the gain of the first stage amplifier;

access the gain of the first stage amplifier; and

set the gain of each of the second stage amplifiers.

19. The amplifier assembly of claim 1, further comprising:

an integrated circuit (IC) substrate, the first stage amplifier and the plurality of second stage amplifiers being constructed on the IC substrate; and

process sense circuits constructed on the IC substrate, each of the process sense circuits producing a respective sensed signal indicative of a process-based parameter of the IC substrate, wherein the process-based parameter is one of;

a transconductance of the IC substrate;

a resistivity per unit area of the IC substrate; and

a gate-to-source threshold voltage for transistors constructed on the IC substrate.

20. An amplifier assembly, comprising:

an IC substrate;

a first stage Variable Gain Amplifier (VGA) configured to have a gain controlled in response to one or more gain control signals;

a plurality of parallel second stage Variable Gain Amplifiers (VGAs) having their respective inputs coupled to an output of the VGA;

an AGC module configured to generate the one or more control signals responsive to a power of an amplified signal produced by the first stage VGA;

a control interface coupled to the first stage VGA, each of the second stage VGAs, and the AGC module; and

wherein the first stage VGA, each of the second stage VGAs, and the control interface, and at least a portion of the AGC module are all constructed on the IC substrate.

21. The amplifier assembly of claim 20, further comprising a process monitor, constructed on the IC substrate, for monitoring process-based parameters of the IC substrate.

22. The amplifier assembly of claim 21, wherein the control interface is coupled to the processor monitor.

23. A system for processing an input signal including multiple television (TV) channels, comprising:

an amplifier assembly configured to produce, from the input signal, multiple amplified output signals in parallel with each other, each amplified output signal including the multiple TV channels;

multiple tuners, each tuner corresponding to a respective one of the multiple amplified signals, each tuner configured to select a subset of the multiple TV channels in the corresponding amplified signal, and to produce a corresponding tuned signal including the selected subset of TV channels; and

multiple demodulators, each demodulator corresponding to a respective one of the tuned signals, each demodulator configured to demodulate at least one of the selected subset of TV channels in the corresponding tuned signal, to produce a corresponding demodulated TV signal.

24. The system of claim 23, wherein each tuner is configured to select a single TV channel, and each corresponding demodulator is configured to demodulate the single selected TV channel.

25. The system of claim 23, wherein the multiple demodulators include at least one digital TV demodulator configured to demodulate one of a QAM TV signal, and a QPSK TV signal.

26. The system of claim 23, wherein the multiple demodulators include an analog TV demodulator.

27. The system of claim 23, wherein the multiple demodulators include an HDTV demodulator.

28. The system of claim 23, wherein the amplifier assembly includes an Automatic Gain Control (AGC) module for maintaining an amplitude of each of the amplified signals at a respective constant level relative to a varying amplitude of the input signal.

29. The system of claim 28, wherein the AGC module is configured to operate autonomously.