Reflective Arrayed Waveguide Grating

• US 20040105610A1
• Filed: 10/15/2003
• Published: 06/03/2004
• Est. Priority Date: 10/24/2002
• Status: Active Grant

• Current Assignee: Applies Research & Photonics, Inc.
• Original Assignee: Anis Rahman
• Inventors: Rahman, Anis
• Granted Patent: US 7,110,627 B2
• Time in Patent Office: Days
• US Class Current: 385/14
• CPC Class Codes: G02B 6/12007 forming wavelength selective elements, e.g. multiplexer, demultiplexer
• CPC Class Codes: G02B 6/12011 characterised by the arrayed waveguides, e.g. comprising a filled groove in the array section
• CPC Class Codes: G02B 6/12019 characterised by the optical interconnection to or from the AWG devices, e.g. integration or coupling with lasers or photodiodes coupling integrated waveguide to fibre G02B6/30, to optoelectronic element G02B6/42; monolithic integration of integrated waveguides with other optical elements G02B6/12004

Abstract

This invention discloses a “reflective arrayed waveguide grating,” (RAWG) for demultiplexing a multiplexed optical signal into its component wavelengths and for multiplexing n optical signals into a multiplexed signal. The present invention found that a single slab can be used for coupling the signal in and for focusing the signal out of the array of waveguide that functions as a grating; and a single external fiber array interface containing plurality of fibers can be used for both inputting the signal in and for outputting the signal from the RAWG. Advantageously, this method reduces the chip size and on-chip insertion loss by eliminating a slab and using 50% shorter waveguides in the array allowing significant savings of the silicon real estate. The smaller chip size increases the reliability of the device significantly and almost doubles the yield of chips per wafer. Additionally, used as a building block, these chips can enable further functionality enhancement via tiers of monolithic triple-phase integration.

Claims

1. A photonic integrated circuit (PIC) for demultiplexing a multiplexed optical signal in to its constituent wavelengths and for combining n input optical signals composed of n different wavelengths in to a multiplexed signal. The said PIC is composed of:

a plurality of input/output waveguides for inputting signal to and outputting signal from the PIC;

a slab waveguide for coupling the input signal to the array of waveguides and for focusing the demultiplexed signals to the output waveguides;

an array waveguide, containing plurality of waveguides which are optically coupled on the slab plane at one end, and terminated by a reflecting mirror on the other end, having a fixed path difference between neighboring waveguides, for coupling the input signal and then separate the same into constituent wavelengths and then focusing the individual wavelengths back on to the slab-input/output waveguide interface;

a reflective mirror terminating the said array of waveguide for reflecting the signals incident on it from the array waveguide back into the array; and

a substrate on which the input/output waveguides, the slab, and the array of waveguides are fabricated by a layer by layer approach. The assembly forms a photonic integrated circuit or an optical chip, termed as a reflective arrayed waveguide grating (RAWG).

2. The RAWG of claim 1 wherein a single slab waveguide is provided that functions as both input and output slab;

and wherein a single external interface functions as both input and output allowing significant packaging reliability enhancement of the device.

3. The RAWG of claim 1 wherein the design architecture reduces the chip size to approximately 50% of that required for a TAWG of identical channel number;

and wherein the on-chip loss is reduced significantly compared to a TAWG of same number of channels and both made from the same material.

4. The RAWG of claim 1 wherein the reduced chip size almost doubles the RAWG yield per wafer compared to a TAWG having the same number of channels as RAWG;

and wherein the higher yield in turn lowers the production cost of the devices while simultaneously enhances performance; and

further wherein a smaller chip size will result in more compact package size.

5. The RAWG of claim 1 wherein the design allows significantly lower on-chip loss.

6. The RAWG of claim 1 wherein any one of the waveguides can be used as the input channel while the remainder waveguides will function as the output channels allowing a built-in vernier effect, because, any of the waveguides can be used to launch the input signal while the rest will automatically be the outputs;

and wherein the RAWG allows to choose output wavelengths by choosing an appropriate input waveguide, while for a fixed input channel, the output wavelengths are always fixed.

7. The RAWG of claim 1 wherein there is plurality of channel numbers that can be varied as 4, 8, 12, 16, 24, 32, and 48;

wherein channel spacing can be varied to comply with ITU-T definitions such as 0.25 nm (˜

31 GHz), 0.4 nm (50 GHz), 0.8 nm (100 GHz), 1.6 nm (200 GHz), 4 nm (500 GHz), and 5 nm (624 GHz); and

wherein the channel frequencies can be designed to match the ITU grid frequencies.

8. A method of integrating a photonic integrated circuit (PIC) by monolithic integration over three tiers, termed triple-phase integration;

wherein a RAWG such as the one in claim 1 used as a building block for further functionality enhancement;

wherein a second-phase integration of the said RAWG in claim 1 produces passive devices with amplification; and

wherein a third-phase integration of the said RAWG in claim 1 produces active devices with amplification.

9. A method of second-phase integration of the photonic integrated circuit (PIC) as in claim 7;

wherein a RAWG for demultiplexing a multiplexed optical signal in to its constituent wavelengths and for combining n input optical signals composed of n different wavelengths in to a multiplexed signal; and

for amplifying the said multiplexed and demultiplexed signals;

the said PIC is composed of;

a RAWG as in claim 1;

a waveguide amplifier block;

the RAWG and the amplifier block are connected via waveguide interconnect;

a substrate housing the RAWG, the amplifier block, and the waveguide interconnects that are fabricated by a monolithic means such as a layer by layer approach. The assembly forms a second-phase photonic integrated circuit, termed as an amplified PIC (APIC).

10. A method of third-phase integration of the photonic integrated circuit (PIC) as in claim 7;

wherein a RAWG for demultiplexing a multiplexed optical signal in to its constituent wavelengths and for combining n input optical signals composed of n different wavelengths in to a multiplexed signal;

for modulation of the said optical signal; and

for amplifying the said optical signal;

the said PIC is composed of;

a modulator block composed of waveguides and electrodes;

a RAWG as in claim 1;

a waveguide amplifier block;

the modulator, the RAWG and the amplifier block are connected via waveguide interconnect;

a substrate housing the modulator block, the RAWG, the amplifier block, and the waveguide interconnects that are fabricated by a monolithic means such as a layer by layer approach. The assembly forms a third-phase photonic integrated circuit, termed an amplified electronic PIC (AEPIC).