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Methods for assembling multiple semiconductor devices

  • US 20040106229A1
  • Filed: 11/12/2003
  • Published: 06/03/2004
  • Est. Priority Date: 06/27/2002
  • Status: Active Grant
First Claim
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1. A method for assembling a multidie semiconductor device package, comprising:

  • providing an interposer with a substantially planar substrate and a receptacle formed substantially through the substrate, the substrate having an upper surface and a lower surface, at least the upper surface having conductors thereon;

    positioning at least one first-level semiconductor device within the receptacle, a backside of the at least one first-level semiconductor device being substantially coplanar with the lower surface of the interposer or located within a plane which extends through the interposer an interstitial space remaining at least between peripheral edges of the at least one first-level semiconductor device and the substrate;

    positioning a second-level semiconductor device above the upper surface of the substrate;

    electrically connecting the at least one first-level semiconductor device to at least one of the conductors on the upper surface of the substrate and the second-level semiconductor device by first-level conductive members; and

    electrically connecting the second-level semiconductor device to the conductors on the upper surface of the substrate by second-level conductive members.

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