Method and system for context-specific mask writing

• US 20040107412A1
• Filed: 07/14/2003
• Published: 06/03/2004
• Est. Priority Date: 07/12/2002
• Status: Active Grant

• Current Assignee: Cadence Design Systems Incorporated (Cadence Group)
• Original Assignee: Cadence Design Systems Incorporated (Cadence Group)
• Inventors: Scheffer, Louis K., Pack, Robert C.
• Granted Patent: US 7,249,342 B2
• Time in Patent Office: Days
• US Class Current: 716/19
• CPC Class Codes: G03F 1/36 Masks having proximity correction features; Preparation thereof, e.g. optical proximity correction [OPC] design processes
• CPC Class Codes: G03F 1/68 Preparation processes not covered by groups G03F1/20 - G03F1/50
• CPC Class Codes: G03F 1/78 by charged particle beam [CPB], e.g. electron beam patterning of masks

Abstract

A method for generating lithography marks includes generating integrated circuit design data and using context information from the integrated circuit design data to write a mask.

Claims

1. A method for writing a mask, comprising:

generating integrated circuit design data; and

using information for interfeature relationships of the integrated circuit design data to write the mask.

2. The method of claim 1, wherein the interfeature relationships are on one layer of the integrated circuit design.

3. The method of claim 1, wherein the interfeature relationships are across multiple layers of the integrated circuit design.

4. The method of claim 1, wherein the interfeature relationships comprise:

interfeature process proximity effects;

interfeature coupling across layers;

interfeature electronic relationships;

or

wire interconnects longer than a given length.

5. The method of claim 1, wherein using the information for interfeature relationships to write the mask further comprises:

passing the information for interfeature relationships to a mask writing system.

6. A method for generating a lithography mask or a printed wafer, comprising:

generating integrated circuit design data; and

using context information from the integrated circuit design data to write the mask or printed wafer.

7. The method of claim 6, wherein using context information comprises:

analyzing mask features for contextual priority.

8. The method of claim 7, wherein using context information comprises:

assigning priorities to the mask features.

9. The method of claim 8, wherein assigning priorities to the mask features comprises:

applying criteria to mask design data by manual process.

10. The method of claim 8, wherein assigning priorities to the mask features comprises:

applying criteria to mask design data by computer-aided automated process.

11. The method of claim 6, wherein using context information comprises:

analyzing mask features to determine the circuit element expected to be produced by a lithography system at a chip wafer surface.

12. The method of claim 6, further comprising:

configuring a mask design database to include additional contextual mask design data generated in using the contextual information from the integrated circuit design data.

13. The method of claim 12, further comprising:

configuring the mask design database to optimize an order of mask design data for use by a mask writing system.

14. The method of claim 6, wherein using context information comprises:

passing context information to a mask writing system.

15. The method of claim 6, wherein using context information comprises:

controlling a mask writing system based on the context information.

16. An apparatus for mask writing comprising:

means for generating a design of an integrated circuit design;

means for producing circuit contextual information for the integrated circuit design;

means for capturing the circuit contextual information in a mask design database;

means for producing mask contextual information for mask elements in the mask design database based on the circuit contextual information;

means for configuring the mask design database to reflect the mask contextual information; and

means for writing the mask elements on a mask substrate.

17. The apparatus of claim 16, wherein said means for writing further comprises:

means for determining manufacturing enhancements for one or more mask elements based on the mask contextual information; and

means for applying the manufacturing enhancement to the mask element.

18. The apparatus of claim 16, further comprising:

means for producing priority information for the mask elements based on features of the mask elements.

19. A method for mask writing, comprising:

designing an integrated circuit;

passing the design data to a context and priority analysis step;

analyzing design data for each mask element to determine a circuit function, circuit criticality context, and priority for each mask element;

including the circuit function, circuit criticality context, and priority data in a mask design data file; and

using the mask design data file to write a mask.

20. The method of claim 19, wherein design data from the integrated circuit design comprises:

polygonal shape, location, layout geography, circuit functionality and circuit criticality data for each mask element.

21. The method of claim 20, wherein analyzing further comprises:

comparing design data for each mask element to design data for other mask elements and to a predetermined set of mask criteria.

22. A system for writing a mask, comprising:

means for generating integrated circuit design data; and

means for using information for interfeature relationships of the integrated circuit design data to write the mask.

23. The system of claim 22, wherein the interfeature relationships are on one layer of the integrated circuit design.

24. The system of claim 22, wherein the interfeature relationships are across multiple layers of the integrated circuit design.

25. The system of claim 22, wherein the interfeature relationships comprise:

interfeature process proximity effects;

interfeature coupling across layers;

interfeature electronic relationships;

or

wire interconnects longer than a given length.

26. The system of claim 22, said means for wherein using the information for interfeature relationships to write the mask further comprises:

means for passing the information for interfeature relationships to a mask writing system.

27. A system for generating a lithography mask or a printed wafer, comprising:

means for generating integrated circuit design data; and

means for using context information from the integrated circuit design data to write the mask or printed wafer.

28. The system of claim 27, wherein said means for using context information comprises:

analyzing mask features for contextual priority.

29. The system of claim 28, wherein said means for using context information comprises:

means for assigning priorities to the mask features.

30. The system of claim 29, wherein said means for assigning priorities to the mask features comprises:

means for applying criteria to mask design data by manual process.

31. The system of claim 29, wherein said means for assigning priorities to the mask features comprises:

means for applying criteria to mask design data by computer-aided automated process.

32. The system of claim 27, wherein said means for using context information comprises:

means for analyzing mask features to determine the circuit element expected to be produced by a lithography system at a chip wafer surface.

33. The system of claim 27, further comprising:

means for configuring a mask design database to include additional contextual mask design data generated in using the contextual information from the integrated circuit design data.

34. The system of claim 33, further comprising:

means for configuring the mask design database to optimize an order of mask design data for use by a mask writing system.

35. The system of claim 27, wherein said means for using context information comprises:

means for passing context information to a mask writing system.

36. The system of claim 27, wherein said means for using context information comprises:

means for controlling a mask writing system based on the context information.