Metal core substrate packaging

• US 20040107569A1
• Filed: 12/05/2002
• Published: 06/10/2004
• Est. Priority Date: 12/05/2002
• Status: Abandoned Application

• Current Assignee: Intel Corporation
• Original Assignee: Intel Corporation
• Inventors: Azimi, Hamid, Guzek, John, Wood, Dustin
• Application Number:
  US10/313,932
• Publication Number:
  US 20040107569A1
• Time in Patent Office: Days
• US Class Current: 29/846
• CPC Class Codes: H01L 23/142 Metallic substrates having insulating layers
• CPC Class Codes: H01L 23/49822 Multilayer substrates multilayer metallisation on monolayer substrate H01L23/498
• CPC Class Codes: H01L 23/49827 Via connections through the substrates, e.g. pins going through the substrate, coaxial cables H01L23/49822, H01L23/49833, H01L23/4985, H01L23/49861 take precedence
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
• CPC Class Codes: H05K 1/056 the metal substrate being covered by an organic insulating layer
• CPC Class Codes: H05K 2201/0347 Overplating, e.g. for reinforcing conductors or bumps; Plating over filled vias reinforcing the conductive pattern H05K3/24
• CPC Class Codes: H05K 2201/09536 Buried plated through-holes, i.e. plated through-holes formed in a core before lamination
• CPC Class Codes: H05K 2201/0959 Plated through-holes or plated blind vias filled with insulating material
• CPC Class Codes: H05K 3/445 having insulated holes or insulated via connections through the metal core
• CPC Class Codes: H05K 3/4608 comprising an electrically conductive base or core
• CPC Class Codes: Y10T 29/49155 Manufacturing circuit on or in base

Abstract

Apparatus and methods are provided for a rigid metal core carrier substrate. The metal core increases the modulus of elasticity of the carrier substrate to greater than 20 GPa to better resist bending loads and stresses encountered during assembly, testing and consumer handling. The carrier substrate negates the need to provide external stiffening members resulting in a microelectronic package of reduced size and complexity. The coefficient of thermal expansion of the carrier substrate can be adapted to more closely match that of the microelectronic die, providing a device more resistant to thermally-induced stresses. In one embodiment of the method in accordance with the invention, a metal sheet having a thickness in the range including 200-500 μm and a flexural modulus of elasticity of at least 20 GPa is laminated on both sides with dielectric and conductive materials using standard processing technologies to create a carrier substrate.

Claims

1. A method of making a rigid metal core carrier substrate, comprising:

providing a metal core in the form of a metal sheet having a first side, an opposite second side, and at least one through hole, the metal core having a flexural modulus of elasticity of at least 20 GPa;

forming dielectric layers by depositing a dielectric material in a predetermined pattern on the first side, the second side, and each through hole forming a dielectric plug within the through hole;

forming a through hole in the dielectric plug having a diameter smaller than the core through hole forming a dielectric liner;

forming a conductive liner by depositing a conductive material on the dielectric liner defining a plated through hole, the conductive liner insulated from the metal core by the dielectric liner; and

depositing a conductive material in a predetermined pattern on the dielectric layers.

2. The method of claim 1, wherein depositing a dielectric material on the first side, the second side, and the through hole forming a dielectric layer on the first and second sides, and forming a dielectric plug comprises:

covering the first and second side with a laminate of dielectric material; and

curing the laminate at elevated temperature forming a dielectric layer on the first and second side, a portion of the laminate flowing into and plugging the through holes.

3. The method of claim 1, further comprising forming one or more conductive traces on the first and second sides and in electrical communication with predetermined one or more plated through holes.

4. The method of claim 3, wherein forming one or more conductive traces on the first and second sides and in electrical communication with predetermined one or more plated through holes comprises:

forming one or more conductive traces on the first and second sides and in electrical communication with predetermined one or more plated through holes using an additive, semi-additive, or subtractive plating process

5. The method of claim 3, further comprising:

depositing additional one or more dielectric and/or conductive layers on the first and second sides;

producing one or more interlayer interconnects between one or more conductive layers; and

forming one or more conductive traces on predetermined one or more dielectric layers on the first and second sides and in electrical communication with the one or more interlayer interconnects using an additive, semi-additive, or subtractive plating process.

6. The method of claim 1, wherein providing a metal sheet comprises providing a metal sheet having a thickness of at least 200 μ

m comprising a material selected from the group consisting of copper, silver, aluminum, steel, and gold.

7. A method of making a metal core substrate, comprising:

providing a metal core in the form of a metal sheet having a first side, an opposite second side, and at least one through hole, the metal core having a flexural modulus of elasticity of at least 100 GPa;

covering the first and second side and each through hole with a laminate of dielectric material;

curing the laminate at elevated temperature forming a dielectric layer on the first and second side, a portion of the laminate flowing into and plugging the through holes;

forming dielectric through holes in the plug having a diameter smaller that the conductive through hole, and

depositing a conductive layer on each dielectric liner forming a plated through hole, the conductive layer insulated from the metal core by the dielectric liner.

8. The method of claim 7, further comprising forming one or more conductive traces on the first and second sides and in electrical communication with predetermined one or more plated through holes.

9. The method of claim 8, wherein forming one or more conductive traces on the first and second sides and in electrical communication with predetermined one or more plated through holes comprises:

forming one or more conductive traces on the first and second sides and in electrical communication with predetermined one or more plated through holes using an additive, semi-additive, or subtractive plating process.

10. The method of claim 7, wherein providing a metal sheet comprises providing a metal sheet having a thickness of at least 200 μ

m comprising a material selected from the group consisting of copper, silver, aluminum, steel, and gold.

11. A method of making a metal core carrier substrate, comprising:

providing a metal core in the form of a metal sheet having a first side, an opposite second side, and at least one core through hole, the metal core having a flexural modulus of elasticity of at least 20 GPa;

depositing a dielectric material on the first side, the second side, and in each core through hole forming a dielectric layer on the first and second sides, and forming a dielectric plug in each core through hole;

forming a dielectric liner in each core through hole by providing a dielectric though hole in the dielectric plug and centered within the core through hole, the dielectric through hole having a diameter smaller than the core through hole; and

depositing a conductive material on each dielectric liner forming a conductive liner defining a plated through hole, the conductive liner insulated from the metal core by the dielectric liner.

12. The method of claim 11, wherein depositing a dielectric material on the first side, the second side, and the core through hole forming a dielectric layer on the first and second sides, and forming a dielectric plug within each core through hole comprises:

covering the first side and second side with a laminate of dielectric material; and

curing the laminate at elevated temperature forming a dielectric layer on the first and second side, a portion of the laminate flowing into and plugging the core through holes.

13. The method of claim 11, further comprising forming one or more conductive layers on the first and second sides and in electrical communication with predetermined one or more plated through holes.

14. The method of claim 13, wherein forming one or more conductive layers on the first and second sides comprises forming one or more conductive traces on the first and second sides forming a circuit pattern.

15. The method of claim 14, wherein forming one or more conductive traces on the first and second sides forming a circuit pattern comprises forming one or more conductive traces on the first and second sides forming a circuit pattern using a process selected from the group consisting of discrete wiring, and subtractive, semi-additive, additive lithographic techniques.

16. The method of claim 13, further comprising:

depositing additional one or more dielectric and/or conductive layers in an alternating pattern on the first and second sides;

producing one or more bore holes between one or more conductive layers;

depositing a conductive material in the bore holes to electrically interconnect one conductive layer to another conductive layer; and

forming one or more conductive traces on predetermined one or more dielectric layers on the first and second sides and in electrical communication with the conductive material within predetermined one or more bore holes using an additive, semi-additive, or subtractive plating process.

17. The method of claim 11, wherein providing a metal sheet comprises providing a metal sheet having a thickness of at least 200 μ

m comprising a material selected from the group consisting of copper, silver, aluminum, steel, and gold.

18. A rigid metal core carrier substrate, comprising:

a metal core comprising a metal sheet having a first side and a second side, the metal sheet having a thickness in the range including 200-500 μ

m and a flexural modulus of elasticity of at least 20 GPa;

at least one dielectric layer covering the first side and the second side;

at least one conductive layer covering the dielectric layer on the first and second side; and

a plurality of plated through holes, the plated through holes comprising a tubular-shaped dielectric liner and a conductive liner lining the inside surface of the dielectric liner, the plated through holes extending through the metal sheet and the dielectric layers covering the first and second sides, the conductive liner in electrical communication with the conductive layer on the first and second side, the dielectric liner insulating the metal sheet from the conductive liner.

19. The rigid metal core carrier substrate of claim 18, further comprising:

additional one or more dielectric and/or conductive layers on the first and second sides; and

at least one interlayer interconnects between and in electrical communication with one or more conductive layers or the metal sheet.

20. The rigid metal core carrier substrate of claim 18, wherein the metal sheet comprises a material selected from the group consisting of copper, silver, aluminum, steel, and gold.

21. A high flexural modulus of elasticity microelectronic device, comprising:

a metal core having at least one clearance formed there through, the metal core having a thickness in the range including 200-500 μ

m and a flexural modulus of elasticity of at least 20 GPa;

at least one dielectric layer disposed on each of top and bottom surfaces of the metal core;

at least one conductive layer disposed on each of the dielectric layers;

at least one conductive via electrically connecting the conductive layers, the conductive via electrically insulated from the metal core, the substrate adapted to electrically and mechanically interconnect with a microelectronic die; and

a microelectronic die electrically and mechanically interconnected to at least one of the at least one conductive layer.

22. The high flexural modulus of elasticity microelectronic device of claim 21, further comprising at least one interlayer interconnect between and in electrical communication with one or more conductive layers or the metal sheet.

23. The high flexural modulus of elasticity microelectronic device of claim 21, wherein the metal sheet comprises a material selected from the group consisting of copper, silver, aluminum, steel, and gold.