Active matrix thin film transistor array backplane
First Claim
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1. A method of fabricating a thin film transistor active matrix backplane, comprising the steps of:
- depositing a first passivation layer on a polyimide substrate to passivate the substrate;
applying a gate material to the first passivation layer;
patterning the gate material to form an array of gate electrodes;
depositing a gate insulating layer over the gate electrodes and the first passivation layer;
depositing a channel layer comprising amorphous silicon over the gate insulating layer;
depositing a contact layer comprising phosphorus doped amorphous silicon on the semiconducting channel layer;
depositing a source-drain layer on the contact layer;
patterning an array of source electrodes, drain electrodes, lines and pads in the source-drain layer;
patterning an array of transistor islands on the source and drain electrodes;
depositing a protective layer on the source-drain layer; and
exposing the drain electrodes and pads.
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Abstract
A thin film transistor array fabricated on a polyimide substrate forms a backplane for an electronic display. The thin film transistor array incorporates gate electrodes, a gate insulating layer, semiconducting channel layers deposited on top of the gate insulating layer, a source electrode, a drain electrode and a contact layer beneath each of the source and drain electrodes and in contact with at least the channel layer. An insulating encapsulation layer is positioned on the channel layer. The layers are deposited onto the polyimide substrate using PECVD and etched using photolithography to form the backplane.
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Citations
95 Claims
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1. A method of fabricating a thin film transistor active matrix backplane, comprising the steps of:
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depositing a first passivation layer on a polyimide substrate to passivate the substrate;
applying a gate material to the first passivation layer;
patterning the gate material to form an array of gate electrodes;
depositing a gate insulating layer over the gate electrodes and the first passivation layer;
depositing a channel layer comprising amorphous silicon over the gate insulating layer;
depositing a contact layer comprising phosphorus doped amorphous silicon on the semiconducting channel layer;
depositing a source-drain layer on the contact layer;
patterning an array of source electrodes, drain electrodes, lines and pads in the source-drain layer;
patterning an array of transistor islands on the source and drain electrodes;
depositing a protective layer on the source-drain layer; and
exposing the drain electrodes and pads. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 93, 94, 95)
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41. A polymer dispersed electronic display comprising:
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a backplane having an active matrix thin film transistor array formed on a flexible polyimide substrate;
a top layer of indium tin oxide coated polyester; and
a middle layer disposed between the backplane and the top layer composed of a 20;
80 mixture of prepolymer PN393 and TL213;
wherein the middle layer is cured using a light source.
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42. A method of making a polymer dispersed electronic display, comprising the steps of:
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forming an active matrix thin film transistor array backplane on a polyimide substrate;
depositing a display medium on the active matrix thin film transistor array backplane;
depositing a protective layer comprising indium tin oxide coated polyester over the display medium; and
curing the display medium between the backplane and the protective layer.
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43. A thin film transistor backplane, comprising:
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a polyimide substrate;
a first passivation layer deposited on a deposition surface of the polyimide substrate;
an array of gate electrodes and gate lines patterned on the passivation layer;
a gate insulating layer deposited over the array of gate electrodes and gate lines;
a semiconducting channel layer deposited over the gate insulating layer;
a contact layer deposited on and in contact with the channel layer; and
an array of source electrodes, drain electrodes, lines and pads fabricated on and in contact with the contact layer.
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44. A portable electronic device comprising,
a housing to house a portion of one or more components of said portable electronic device; - and
a display assembly coupled to a flexible backplane assembly having formed thereon one or more transistors for displaying content to a user of the portable electronic device, the flexible backplane assembly capable of flexing in one or more dimensions to change a topography of a surface of the flexible backplane assembly, and wherein a portion of the display assembly forms a portion of the housing. - View Dependent Claims (45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56)
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57. A flexible electronic display having a plurality of pixels, the flexible electronic display comprising,
a flexible display medium with a transparent reference electrode layer for displaying indicia to an operator, the indicia providing the operator with indications of a state of a monitored process; - and
one or more thin film transistors coupled to the flexible display medium and formed on a substrate capable of flexing in a plurality of dimensions, the one or more thin film transistors and the flexible display medium flex to adapt to one or more contours of a surface of the instrument panel during mounting of said flexible electronic display thereto. - View Dependent Claims (58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 89, 90)
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74. A display device for displaying content to a user, said display device comprising,
a matrix of transistors formed on a flexible substrate, the flexible substrate capable of flexing in one or more dimensions with the transistors formed thereon to adapt to a desired contour, and a plurality of pixels coupled to the matrix of transistors, each of the plurality of pixels addressable by the matrix of transistors to transfer a change from a selected one of the matrix of transistors to one of the plurality of pixels to display a portion of the content to the user.
Specification