Partial reconfiguration of a programmable logic device using an on-chip processor
First Claim
1. A programmable logic device comprising:
- a configuration memory array having a plurality of frames, wherein the configuration memory array stores configuration data values for controlling the configuration of the programmable logic device;
a processor configured to implement a partial reconfiguration of the programmable logic device by reading a frame from the configuration memory array, modifying only a select subset of the frame, thereby creating a modified frame, and writing the modified frame back to the configuration memory array.
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Abstract
A programmable logic device, such as a field programmable gate array, is partially reconfigured using a read-modify-write scheme that is controlled by a processor. The partial reconfiguration includes (1) loading a base set of configuration data values into a configuration memory array of the programmable logic device, thereby configuring the programmable logic device; (2) reading a first frame of configuration data values from the configuration memory array; (3) modifying a subset of the configuration data values in the first frame of configuration data values, thereby creating a first modified frame of configuration data values; and (4) overwriting the first frame of configuration data values in the configuration memory array with the first modified frame of configuration data values, thereby partially reconfiguring the programmable logic device. The steps of reading, modifying and overwriting are performed under the control of a processor.
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Citations
20 Claims
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1. A programmable logic device comprising:
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a configuration memory array having a plurality of frames, wherein the configuration memory array stores configuration data values for controlling the configuration of the programmable logic device;
a processor configured to implement a partial reconfiguration of the programmable logic device by reading a frame from the configuration memory array, modifying only a select subset of the frame, thereby creating a modified frame, and writing the modified frame back to the configuration memory array. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9)
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10. A programmable logic device comprising:
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a configuration memory array configured to store frames of configuration data values that define the configuration of the programmable logic device;
means for reading a first frame from the configuration memory array;
means for modifying a subset of the configuration data values in the first frame, thereby creating a first modified frame; and
means for overwriting the first frame of the configuration memory array with the first modified frame, thereby partially reconfiguring the programmable logic device.
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11. A method of partially reconfiguring a programmable logic device, the method comprising:
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loading a base set of configuration data values into a configuration memory array of the programmable logic device, thereby configuring the programmable logic device;
reading a first frame of configuration data values from the configuration memory array;
modifying a subset of the configuration data values in the first frame of configuration data values, thereby creating a first modified frame of configuration data values; and
overwriting the first frame of configuration data values in the configuration memory array with the first modified frame of configuration data values, thereby partially reconfiguring the programmable logic device. - View Dependent Claims (12, 13, 14, 15, 16, 17, 18, 19, 20)
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Specification