Method and apparatus for laser annealing

• US 20040115931A1
• Filed: 12/12/2002
• Published: 06/17/2004
• Est. Priority Date: 12/12/2002
• Status: Active Grant

• Current Assignee: Micron Technology, Inc.
• Original Assignee: Intel Corporation
• Inventors: Liu, Mark Y., Taylor, Mitchell
• Granted Patent: US 7,211,501 B2
• Time in Patent Office: Days
• US Class Current: 438/660
• CPC Class Codes: H01L 21/268 using electromagnetic radiation, e.g. laser radiation
• CPC Class Codes: Y10T 117/1068 including heating or cooling details [e.g., shield configuration]

Abstract

Numerous embodiments of a method and apparatus for laser annealing are disclosed. In one embodiment, a method of laser annealing comprises performing one or more annealing processes on one or more portions of a semiconductor device, where one or more annealing processes performed on one or more portions of the semiconductor device are varied based at least in part on the particular portion of the semiconductor device being annealed, and/or on one or more desirable characteristics of the particular portion of the semiconductor device being annealed.

Claims

1. A method of forming a semiconductor device, comprising:

performing one or more annealing processes on one or more portions of the semiconductor device, wherein at least one of the annealing processes is varied for different portions of the semiconductor device, wherein the process is varied based at least in part on one or more desirable characteristics of the particular portion of the semiconductor device being annealed.

2. The method of claim 1, wherein one or more desirable characteristics is one of:

reliability, efficiency, or speed.

3. The method of claim 1, wherein at least one of the annealing processes comprises laser annealing.

4. The method of claim 1, wherein the semiconductor device comprises an integrated circuit.

5. The method of claim 1, wherein the particular portion of the semiconductor device comprises a transistor block.

6. The method of claim 1, wherein said one or more annealing processes comprises a rapid thermal annealing (RTA).

7. The method of claim 3, wherein the at least one annealing process is varied by varying pulse width.

8. The method of claim 3, wherein the at least one annealing process is varied by varying laser fluence.

9. A method of annealing a silicon wafer, comprising:

performing an annealing processes on a portion of a semiconductor device;

altering at least one characteristic of the annealing process;

performing another annealing process on a different portion of a semiconductor device, wherein said different portion and said another annealing process are selected based at least in part on the location of said another portion.

10. The method of claim 9, wherein the altering is based on one or more desirable characteristics of the particular portion being annealed.

11. The method of claim 10, wherein said one or more desirable characteristics is one of:

reliability, speed, or efficiency.

12. The method of claim 9, wherein at least one of the annealing processes comprises laser annealing.

13. The method of claim 9, wherein the semiconductor device comprises an integrated circuit.

14. The method of claim 9, wherein at least one of said portions of the semiconductor device comprises a transistor block.

15. The method of claim 9, wherein said one or more annealing processes comprises a rapid thermal annealing (RTA).

16. The method of claim 12, wherein said at least one characteristic comprises pulse width.

17. The method of claim 12, wherein said at least one characteristic comprises laser fluence.

18. An apparatus for laser annealing, comprising:

a laser portion;

an optical controller portion; and

a motion controller portion, wherein said apparatus includes the capability to, in operation;

perform an annealing process on a portion of a semiconductor device;

alter at least one characteristic of the annealing process;

perform another annealing process on a different portion of a semiconductor device, wherein said different portion and said another annealing process are selected based at least in part on one or more desirable characteristics of the different portion being annealed.

19. The apparatus of claim 18, wherein said one or more desirable characteristics is one of:

reliability, speed, or efficiency.

20. The apparatus of claim 19, and further comprising basing the annealing process on the particular location of the particular portion being annealed.

21. The apparatus of claim 18, wherein the semiconductor device comprises an integrated circuit.

22. The apparatus of claim 18, wherein at least one of said portions of the semiconductor device comprises a transistor block.

23. The apparatus of claim 18, wherein said at least one characteristic of the annealing process comprises pulse width.

24. The apparatus of claim 18, wherein said at least one characteristic of the annealing process comprises laser fluence.

25. The apparatus of claim 18, wherein said one or more characteristics of the annealing process is altered by the optical controller.

26. The apparatus of claim 18, wherein said one or more characteristics of the annealing process is altered by the motion controller.