Data processing system having no system memory

• US 20040117591A1
• Filed: 12/12/2002
• Published: 06/17/2004
• Est. Priority Date: 12/12/2002
• Status: Active Grant

• Current Assignee: International Business Machines Corporation
• Original Assignee: International Business Machines Corporation
• Inventors: Ghai, Sanjeev, Arimilli, Ravi Kumar, Wright, Kenneth Lee, Dodson, John Steven
• Granted Patent: US 7,017,024 B2
• Time in Patent Office: Days
• US Class Current: 711/203
• CPC Class Codes: G06F 12/08 in hierarchically structured memory systems, e.g. virtual memory systems
• CPC Class Codes: G06F 12/0802 Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
• CPC Class Codes: Y02D 10/00 Energy efficient computing, e.g. low power processors, power management or thermal management

Abstract

A data processing system having no system memory is disclosed. The data processing system includes multiple processing units. The processing units have volatile cache memories operating in a virtual address space that is greater than a real address space. The processing units and the respective volatile memories are coupled to a storage controller operating in a physical address space that is equal to the virtual address space. The processing units and the storage controller are coupled to a hard disk via an interconnect. The storage controller allows the mapping of a virtual address from one of the volatile cache memories to a physical disk address directed to a storage location within the hard disk without transitioning through a real address.

Claims

1. A data processing system capable of utilizing a virtual memory processing scheme, said data processing system comprising:

a plurality of processing units, wherein said plurality of processing units have volatile cache memories operating in a virtual address space greater than a real address space;

an interconnect coupled to said plurality of processing units and volatile cache memories;

a non-volatile physical storage device coupled to said plurality of processing units via said interconnect; and

a storage controller coupled to said interconnect for mapping a virtual address from one of said volatile cache memories to a physical disk address directed to a storage location within said non-volatile physical storage device without transitioning through a real address.

2. The data processing system of claim 1, wherein a virtual address range of said plurality of processing units equals to a physical disk address range of said non-volatile physical storage device.

3. The data processing system of claim 2, wherein said non-volatile physical storage device is a hard disk.

4. The data processing system of claim 3, wherein said hard disk is coupled to said interconnect via an input/output channel converter.

5. The data processing system of claim 4, wherein said hard disk is coupled to said input/output channel converter via an adapter.