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Native Lookup Instruction for File-Access Processor Searching a Three-Level Lookup Cache for Variable-Length Keys

  • US 20040117600A1
  • Filed: 04/02/2003
  • Published: 06/17/2004
  • Est. Priority Date: 12/12/2002
  • Status: Active Grant
First Claim
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1. A micro-processor comprising:

  • an instruction decoder for decoding instructions in a program being executed by the processor, the instructions including a lookup instruction;

    a register file containing registers that store operands operated upon by the instructions, the registers being identified by operand fields in the instructions decoded by the instruction decoder;

    a memory-access unit for accessing entries of a lookup cache;

    an address generator for generating an address to the memory-access unit;

    a comparator for comparing stored keys read from the entries to an input key;

    wherein the input key is a variable-length operand;

    a lookup unit, activated by the instruction decoder when the lookup instruction is decoded, for performing a lookup operation indicated by the lookup instruction, the lookup operation searching the lookup cache for a matching entry that has a stored key that matches the input key, whereby the lookup instruction is decoded and executed by the processor.

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