Programmable management IO pads for an integrated circuit
First Claim
1. A transceiver, comprising:
- a plurality of pads, wherein at least one of said plurality of pads is a programmable IO pad capable of supporting at least two data protocols and at least two electrical specifications, wherein at least one of said plurality of pads is a programmable MDIO pad capable of supporting at least two data protocols and at least two electrical specifications; and
a plurality of ports in communications with said plurality of pads, wherein one of said plurality of ports is a parallel port in communications with said programmable IO pad.
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Accused Products
Abstract
A multi-port SERDES transceiver includes multiple parallel and serial ports, and the flexibility to connect any one of the parallel or serial ports to another parallel or serial port. The ports include programmable pads that are capable of supporting multiple different data protocols, timing protocols, electrical specifications, and input-output functions. A management data IO pad also enables the transceiver to support different electrical requirements and data protocols at the same time. The substrate layout of the transceiver is configured so that the parallel ports and the serial ports are on the outer perimeter. A logic core is at the center, where the logic core operates the serial and parallel data ports, and the bus that connects the data ports. The bus can be described as a “ring” structure (or donut “structure”) around the logic core, and is configured between the logic core and the data ports.
80 Citations
19 Claims
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1. A transceiver, comprising:
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a plurality of pads, wherein at least one of said plurality of pads is a programmable IO pad capable of supporting at least two data protocols and at least two electrical specifications, wherein at least one of said plurality of pads is a programmable MDIO pad capable of supporting at least two data protocols and at least two electrical specifications; and
a plurality of ports in communications with said plurality of pads, wherein one of said plurality of ports is a parallel port in communications with said programmable IO pad. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13)
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14. The transceiver of clam 11, further comprising a packet bit error rate tester (BERT) connected to said bus, said packet BERT able to determine bit error rates of at least one of said multiple parallel ports and said multiple serial ports.
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15. A method for programming a transceiver, comprising:
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accessing MDIO instructions that specify an electrical specification for the transceiver;
executing said MDIO instructions to configure a programmable IO pad disposed on the transceiver; and
sending or receiving data at said programmable IO pad in accordance with said electrical specification. - View Dependent Claims (16, 17, 18, 19)
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Specification