Etch thinning techniques for wafer-to-wafer vertical stacks
First Claim
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1. A method of fabricating a stacked microelectronic device, comprising:
- providing a stacked wafer structure including a first microelectronic wafer attached to a second microelectronic wafer by at least one interconnect layer extending between an active surface of the first microelectronic wafer and an active surface of the second microelectronic wafer, wherein a portion of said first microelectronic wafer is unsupported; and
etching away said first microelectronic wafer unsupported portion.
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Abstract
Methods for thinning wafer-to-wafer vertical stacks in the fabrication of stacked microelectronic devices. The methods include etching away unsupported portions of a wafer to be thinned in the vertical stack. The removal of the unsupported portions substantially eliminates potential cracking and chipping of the wafer, which can occur during the thinning process when the unsupported portions exist.
12 Citations
19 Claims
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1. A method of fabricating a stacked microelectronic device, comprising:
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providing a stacked wafer structure including a first microelectronic wafer attached to a second microelectronic wafer by at least one interconnect layer extending between an active surface of the first microelectronic wafer and an active surface of the second microelectronic wafer, wherein a portion of said first microelectronic wafer is unsupported; and
etching away said first microelectronic wafer unsupported portion. - View Dependent Claims (2, 3, 4, 5, 6, 7)
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8. A method of fabricating a stacked microelectronic device comprising:
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providing a first microelectronic wafer having an active surface, a back surface, and at least one edge, said first microelectronic wafer further including an integrated circuitry layer extending from said first microelectronic wafer active surface into said first microelectronic wafer and an interconnect layer on said first microelectronic wafer active surface, and an exclusion zone proximate said first microelectronic wafer edge;
providing a second microelectronic wafer having an active surface and an integrated circuitry layer extending from said second microelectronic wafer active surface into said second microelectronic wafer and an interconnect layer on at least a portion of said second microelectronic wafer active surface;
attaching said first microelectronic wafer interconnect layer to said second microelectronic wafer interconnect layer, wherein a portion of said first microelectronic wafer is unsupported proximate said first microelectronic wafer exclusion zone; and
etching away said first microelectronic wafer unsupported portion. - View Dependent Claims (9, 10, 11, 12, 13, 14, 15, 16)
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17. A method of fabricating a stacked microelectronic device comprising:
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providing a first microelectronic wafer having an active surface, a back surface, and at least one edge, said first microelectronic wafer further including an integrated circuitry layer extending from said first microelectronic wafer active surface into said first microelectronic wafer and an interconnect layer on said first microelectronic wafer active surface, and an exclusion zone proximate said first microelectronic wafer edge;
providing a second microelectronic wafer having an active surface and an integrated circuitry layer extending from said second microelectronic wafer active surface into said second microelectronic wafer and an interconnect layer on at least a portion of said second microelectronic wafer active surface;
attaching said first microelectronic wafer interconnect layer to said second microelectronic wafer interconnect layer, wherein a portion of said first microelectronic wafer is unsupported proximate said first microelectronic wafer exclusion zone;
thinning said first microelectronic wafer to form a first thinned back surface;
placing said first microelectronic wafer first thinned back surface on a wafer spin processor;
spinning said wafer spin processor; and
dispensing an etchant to a back surface of said second microelectronic wafer which etches away said first microelectronic wafer unsupported portion. - View Dependent Claims (18, 19)
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Specification