Liquid crystal display device and method of fabricating the same

• US 20040119897A1
• Filed: 06/26/2003
• Published: 06/24/2004
• Est. Priority Date: 12/23/2002
• Status: Active Grant

• Current Assignee: LG Display Co., Ltd.
• Original Assignee: LG Philips LCD Company Limited (LG Display Co., Ltd.)
• Inventors: Choi, Su-Seok, Jang, Sang-Min
• Granted Patent: US 7,133,088 B2
• Time in Patent Office: Days
• US Class Current: 349/38
• CPC Class Codes: G02F 1/136213 Storage capacitors associated with the pixel electrode
• CPC Class Codes: G02F 1/1368 in which the switching element is a three-electrode device G02F1/136277 takes precedence
• CPC Class Codes: H01L 27/124 with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits wiring structures per se H01L23/52
• CPC Class Codes: H01L 27/1255 integrated with passive devices, e.g. auxiliary capacitors

Abstract

A liquid crystal display device includes a plurality of data lines arranged along a first direction on a substrate, a plurality of gate lines arranged a second direction perpendicular to the first direction on the substrate to define a plurality of pixel regions, each of the gate lines having at least one first set of protrusions and depressions, a driving device within each of the pixel regions, a pixel electrode within each of the pixel regions, and a metal layer overlapping each of the gate lines to create a storage capacitor.

Claims

1. A liquid crystal display device, comprising:

a plurality of data lines arranged along a first direction on a substrate;

a plurality of gate lines arranged a second direction perpendicular to the first direction on the substrate to define a plurality of pixel regions, each of the gate lines having at least one first set of protrusions and depressions;

a driving device within each of the pixel regions;

a pixel electrode within each of the pixel regions; and

a metal layer overlapping each of the gate lines to create a storage capacitor.

2. The device according to claim 1, wherein the first set of protrusions and depressions is arranged along the second direction of the gate lines.

3. The device according to claim 2, wherein the first set of protrusions and depressions are arranged along the first direction of the data lines.

4. The device according to claim 2, wherein the first set of protrusions and depressions are arranged having a lattice shape.

5. The device according to claim 1, wherein the driving device includes a thin film transistor.

6. The device according to claim 5, wherein the thin film transistor includes:

a gate electrode on the substrate;

a gate insulating layer over the substrate;

a semiconductor layer on the gate insulating layer; and

a source electrode and a drain electrode on the semiconductor layer.

7. The device according to claim 6, further comprising at least one first protrusion/depression layer on the substrate to form the first set of protrusions and depressions.

8. The device according to claim 7, wherein the first protrusion/depression layer includes metal material.

9. The device according to claim 7, wherein the first protrusion/depression layer includes insulation material.

10. The device according to claim 6, further comprising at least one first groove formed within a surface of the substrate to form the first set of protrusions and depressions.

11. The device according to claim 6, wherein the metal layer is disposed on the gate insulating layer.

12. The device according to claim 11, wherein the metal layer includes metal material similar to metal material of the source electrode and the drain electrode.

13. The device according to claim 6, further comprising a second set of protrusions and depressions in the semiconductor layer.

14. The device according to claim 13, wherein the second set of protrusions and depressions is formed along the source electrode and the drain electrode.

15. The device according to claim 13, wherein the second set of protrusions and depressions is arranged in a lattice shape.

16. The device according to claim 13, further comprising a second protrusion/depression layer in the substrate to form the second set of protrusions and depressions.

17. The device according to claim 16, wherein the second protrusion/depression layer includes insulation material.

18. The device according to claim 16, wherein the second protrusion/depression layer includes metal material.

19. The device according to claim 13, further comprising a second groove formed in a surface of the substrate to form the second set of protrusions and depressions.

20. A liquid crystal display device, comprising:

a plurality of data lines and gate lines arranged in a substrate to define a plurality of pixel regions;

a thin film transistor within each pixel region and including a gate electrode on the substrate, a gate insulating layer on the substrate, a semiconductor layer on the gate insulating layer and having protrusions and depressions, a source electrode and a drain electrode on the semiconductor layer;

a passivation layer on an entire surface of substrate; and

a pixel electrode on the passivation layer.

21. The device according to claim 20, further comprising at least one protrusion/depression layer on the substrate to provide protrusions and depressions in the semiconductor layer.

22. The device according to claim 21, wherein the protrusion/depression layer includes insulation material.

23. The device according to claim 21, wherein the protrusion/depression layer includes metal material.

24. The device according to claim 21, wherein the protrusion/depression layer is arranged along a direction between the source electrode and the drain electrode.

25. The device according to claim 21, wherein the protrusion/depression layer is arranged having a lattice shape.

26. The device according to claim 20, further comprising at least one groove formed in a surface of the substrate to provide protrusions and depressions in the semiconductor layer.

27. The device according to claim 26, wherein the groove is formed along a direction between the source electrode aid the drain electrode.

28. The device according to claim 26, wherein the groove is arranged having a lattice shape.

29. The device according to claim 20, further comprising a metal layer arranged along a direction of the gate line to form a storage capacitor.

30. The device according to claim 29, further comprising a protrusion/depression layer arranged along a direction of the gate line.

31. The device according to claim 29, further comprising a groove formed along a direction of the gate line.

32. A method of fabricating a liquid crystal display device, comprising:

forming a plurality of data lines arranged along a first direction on a substrate;

forming a plurality of gate lines arranged a second direction perpendicular to the first direction on the substrate to define a plurality of pixel regions, each of the gate lines having at least one first set of protrusions and depressions;

forming a driving device within each of the pixel regions;

forming a pixel electrode within each of the pixel regions; and

forming a metal layer overlapping each of the gate lines to create a storage capacitor.

33. The method according to claim 32, wherein the first set of protrusions and depressions is arranged along the second direction of the gate lines.

34. The method according to claim 33, wherein the first set of protrusions and depressions are arranged along the first direction of the data lines.

35. The method according to claim 33, wherein the first set of protrusions and depressions are arranged having a lattice shape.

36. The method according to claim 32, wherein the driving device includes a thin film transistor.

37. The method according to claim 36, wherein the thin film transistor includes:

a gate electrode on the substrate;

a gate insulating layer over the substrate;

a semiconductor layer on the gate insulating layer; and

a source electrode and a drain electrode on the semiconductor layer.

38. The method according to claim 37, further comprising forming at least one first protrusion/depression layer on the substrate to form the first set of protrusions and depressions.

39. The method according to claim 38, wherein the first protrusion/depression layer includes metal material.

40. The method according to claim 38, wherein the first protrusion/depression layer includes insulation material.

41. The method according to claim 37, further comprising forming at least one first groove within a surface of the substrate to form the first set of protrusions and depressions.

42. The method according to claim 37, wherein the metal layer is disposed on the gate insulating layer.

43. The method according to claim 42, wherein the metal layer includes metal material similar to metal material of the source electrode and the drain electrode.

44. The method according to claim 37, further comprising forming a second set of protrusions and depressions in the semiconductor layer.

45. The method according to claim 44, wherein the second set of protrusions and depressions is formed along the source electrode and the drain electrode.

46. The method according to claim 45, wherein the second set of protrusions and depressions is arranged in a lattice shape.

47. The method according to claim 44, further comprising forming a second protrusion/depression layer in the substrate to form the second set of protrusions and depressions.

48. The method according to claim 47, wherein the second protrusion/depression layer includes insulation material.

49. The method according to claim 47, wherein the second protrusion/depression layer includes metal material.

50. The method according to claim 44, further comprising forming a second groove in a surface of the substrate to form the second set of protrusions and depressions.