Array substrate for liquid crystal display substrate having high aperture ratio and method for fabricating the same
First Claim
1. An array substrate for a liquid crystal display device, comprising:
- a transparent substrate;
a gate line arranged along a first direction on the transparent substrate;
a gate electrode extending from the gate line;
a common line arranged along the first direction adjacent to the gate line and having a protrusion;
a gate insulation layer on the transparent substrate to cover the gate line, the gate electrode, and the common electrode;
an active layer on the gate insulation layer and over the gate electrode;
first and second ohmic contact layers on the active layer;
a data line arranged along a second direction perpendicular to the first upon the gate insulation layer;
a source electrode extending from the data line and contacting the first ohmic contact layer;
a drain electrode spaced apart from the source electrode and contacting the second ohmic contact layer;
a first capacitor electrode formed on the gate insulation layer and connected to the drain electrode, the first capacitor electrode overlapping the common line and the protrusion of the common line;
a passivation layer formed on the gate insulation layer to cover the data line, the source and drain electrodes, and the first capacitor electrode, the passivation layer having a first contact hole exposing a portion of the capacitor electrode; and
a pixel electrode formed on the passivation layer and contacting the first capacitor electrode through the first contact hole.
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Accused Products
Abstract
An array substrate for a liquid crystal display device includes a transparent substrate, a gate line arranged along a first direction on the transparent substrate, a gate electrode extending from the gate line, a common line arranged along the first direction adjacent to the gate line and having a protrusion, a gate insulation layer on the transparent substrate to cover the gate line, the gate electrode, and the common electrode, an active layer on the gate insulation layer and over the gate electrode, first and second ohmic contact layers on the active layer, a data line arranged along a second direction perpendicular to the first upon the gate insulation layer, a source electrode extending from the data line and contacting the first ohmic contact layer, a drain electrode spaced apart from the source electrode and contacting the second ohmic contact layer, a first capacitor electrode formed on the gate insulation layer and connected to the drain electrode, the first capacitor electrode overlapping the common line and the protrusion of the common line, a passivation layer formed on the gate insulation layer to cover the data line, the source and drain electrodes, and the first capacitor electrode, the passivation layer having a first contact hole exposing a portion of the capacitor electrode, and a pixel electrode formed on the passivation layer and contacting the first capacitor electrode through the first contact hole.
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Citations
42 Claims
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1. An array substrate for a liquid crystal display device, comprising:
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a transparent substrate;
a gate line arranged along a first direction on the transparent substrate;
a gate electrode extending from the gate line;
a common line arranged along the first direction adjacent to the gate line and having a protrusion;
a gate insulation layer on the transparent substrate to cover the gate line, the gate electrode, and the common electrode;
an active layer on the gate insulation layer and over the gate electrode;
first and second ohmic contact layers on the active layer;
a data line arranged along a second direction perpendicular to the first upon the gate insulation layer;
a source electrode extending from the data line and contacting the first ohmic contact layer;
a drain electrode spaced apart from the source electrode and contacting the second ohmic contact layer;
a first capacitor electrode formed on the gate insulation layer and connected to the drain electrode, the first capacitor electrode overlapping the common line and the protrusion of the common line;
a passivation layer formed on the gate insulation layer to cover the data line, the source and drain electrodes, and the first capacitor electrode, the passivation layer having a first contact hole exposing a portion of the capacitor electrode; and
a pixel electrode formed on the passivation layer and contacting the first capacitor electrode through the first contact hole. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11)
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12. The array substrate according to claim 12, wherein the pixel electrode is disposed within the pixel region.
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13. A liquid crystal display device, comprising:
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a first transparent substrate;
a second transparent substrate facing the first transparent substrate;
a gate line arranged on the first transparent substrate along a first direction;
a data line arranged on the first transparent substrate along a second direction perpendicular to the first direction, the gate line and the data line perpendicularly crossing each other and defining a pixel region;
a thin film transistor arranged on the first transparent substrate and adjacent to the pixel region, the thin film transistor electrically connected to both the gate line and the data line;
a common line arranged on the first transparent substrate along the first direction parallel with and adjacent to the gate line, the common line having a protrusion;
a first capacitor electrode overlapping a portion of the common line and the protrusion of the common line to form a first storage capacitor, the first capacitor electrode connected to the thin film transistor;
a pixel electrode formed within the pixel region, the pixel electrode contacting the first capacitor electrode;
a black matrix on the second transparent substrate, the black matrix covering the thin film transistor, the protrusion of the common line, and portions of the gate line and common line; and
a common electrode on the second transparent substrate to cover the black matrix. - View Dependent Claims (14, 15, 16, 17, 18, 19, 20, 21)
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22. A method for fabricating an array substrate for a liquid crystal display device, comprising the steps of:
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forming a gate line arranged along a first direction on a transparent substrate;
forming a gate electrode extending from the gate line;
forming a common line arranged along the first direction adjacent to the gate line on the transparent substrate and having a protrusion;
forming a gate insulation layer on the transparent substrate to cover the gate line, the gate electrode, and the common electrode;
forming an active layer on the gate insulation layer and over the gate electrode;
forming first and second ohmic contact layers on the active layer;
forming a data line arranged along a second direction perpendicular to the first upon the gate insulation layer;
forming a source electrode extending from the data line and contacting the first ohmic contact layer;
forming a drain electrode spaced apart from the source electrode and contacting the second ohmic contact layer;
forming a first capacitor electrode on the gate insulation layer to connect to the drain electrode, the first capacitor electrode overlapping the common line and the protrusion of the common line;
forming a passivation layer on the gate insulation layer to cover the data line, the source and drain electrodes, and the first capacitor electrode, the passivation layer having a first contact hole exposing a portion of the capacitor electrode; and
forming a pixel electrode on the passivation layer to contact the first capacitor electrode through the first contact hole. - View Dependent Claims (23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33)
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34. A method for fabricating a liquid crystal display device, comprising the steps of:
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forming a gate line on a first transparent substrate along a first direction;
forming a data line on the first transparent substrate along a second direction perpendicular to the first direction, the gate line and the data line perpendicularly crossing each other and defining a pixel region;
forming a thin film transistor on the first transparent substrate and adjacent to the pixel region, the thin film transistor is electrically connected to both the gate line and the data line;
forming a common line on the first transparent substrate along the first direction parallel with and adjacent to the gate line, the common line having a protrusion;
forming a first capacitor electrode to overlap a portion of the common line and the protrusion of the common line to form a first storage capacitor, the first capacitor electrode connected to the thin film transistor;
forming a pixel electrode within the pixel region, the pixel electrode contacting the first capacitor electrode;
forming a black matrix on a second transparent substrate, the black matrix covering the thin film transistor, the protrusion of the common line, and portions of the gate line and common line;
forming a common electrode on the second transparent substrate to cover the black matrix; and
forming the first substrate to face the second substrate. - View Dependent Claims (35, 36, 37, 38, 39, 40, 41, 42)
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Specification