Inverter

• US 20040120170A1
• Filed: 10/09/2003
• Published: 06/24/2004
• Est. Priority Date: 12/17/2001
• Status: Active Grant

• Current Assignee: CoolIT Systems Inc.
• Original Assignee: CoolIT Systems Inc.
• Inventors: Scott, Robert John Charles
• Granted Patent: US 6,850,097 B2
• Time in Patent Office: Days
• US Class Current: 363/97
• CPC Class Codes: H02M 1/08 Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
• CPC Class Codes: H02M 1/088 for the simultaneous control of series or parallel connected semiconductor devices
• CPC Class Codes: H02M 1/38 Means for preventing simultaneous conduction of switches
• CPC Class Codes: H02M 7/53871 with automatic control of output voltage or current

Abstract

AC to DC inverters that are formed from electronic switches, such as MOSFETs, that are controlled by gating pulses obtained from comparators. The comparators compare a varying signal against two closely spaced reference voltages so as to provide gating pulses with delays needed to prevent shoot-through in the electronic switches.

Claims

1. An electronic circuit for driving an AC synchronous motor having a center-tapped winding from a DC supply current, comprising:

a first DC input terminal and a second DC input terminal, the first DC input terminal for connection to the DC supply current at a more positive voltage than the second DC input terminal;

three output terminals for connection to the motor winding, the first and third output terminals for connection to the respective end taps of the motor winding and the second output terminal connected to the second output terminal and for connection to the center tap of the motor winding;

a voltage reference source for providing a first reference voltage and a second reference voltage, the first reference voltage more positive that the second reference voltage when the DC input terminals are connected to the DC supply current;

a signal generator connected to the voltage reference source so as to provide a reference signal varying between a maximum voltage that is more positive that the first reference voltage and a minimum voltage that is less positive than the second reference voltage;

a first comparator/buffer connected to the signal generator and the voltage reference source so as to compare the reference signal to the first reference voltage and provide as an output a first series of positive-going output pulses each lasting during the time that the reference signal is more positive than the first reference voltage;

a second comparator buffer connected to the signal generator and the voltage reference source so as to compare the reference signal to the second reference voltage and provide as an output a second series of positive-going output pulses each lasting during the time that the reference signal is less positive than the second reference voltage;

a first electronic switch having a control terminal connected to the output of the first comparator/buffer, a first switched terminal connected to the first output terminal, and a second switched terminal connected to the second DC input terminal, the two switched terminals connected together while an output pulse is applied to the control terminal; and

a second electronic switch having a control terminal connected to the output of the second comparator/buffer, a first switched terminal connected to the third output terminal, and a second switched terminal connected to the second DC input terminal, the two switched terminals connected together while an output pulse is applied to the control terminal.

2. The electronic circuit as defined in claim 1, wherein the waveform of the reference signal is preselected so that the reference signal crosses the voltage range between the reference voltages in a preselected time and remains more positive than the first reference voltage for approximately the same time that it remains below the second reference voltage.

3. The electronic circuit as defined in claim 2, wherein:

the first electronic switch is an N-channel MOSFET, the gate of which is connected to the output of the first comparator/buffer, the source of which is connected to the second DC input terminal, and the drain of which is connected to the first output terminal; and

the second electronic switch is an N-channel MOSFET, the gate of which is connected to the output of the second comparator/buffer, the source of which is connected to the second DC input terminal, and the drain of which is connected to the third output terminal.

4. The electronic circuit as defined in claim 3, wherein the voltage reference source comprises a voltage divider connected between the first DC input terminal and the second DC input terminal, the voltage divider providing the first reference voltage and the second reference voltage;

5. The electronic circuit as defined in claim 4, wherein the voltage divider comprises a resistive voltage ladder.

6. The electronic circuit as defined in claim 5, wherein the resistive voltage ladder further provides a DC-offset reference voltage between the first reference voltage and the second reference voltage and the electronic circuit further comprises a voltage follower connected between the resistive voltage ladder and the signal generator so as to provide the DC-offset reference voltage to the signal generator.

7. The electronic circuit as defined in claim 6, wherein:

the signal generator comprises an operational amplifier configured as a relaxation oscillator so that the time-varying signal has a generally triangular waveform;

the voltage follower comprises an operational amplifier; and

the comparator/buffers comprise operational amplifiers.

8. A DC to AC inverter for providing an AC output current from a DC supply current, comprising:

a first DC input terminal and a second DC input terminal, the first DC input terminal for connection to the DC supply current at a more positive voltage than the second DC input terminal;

first and second output terminals for connection to a device requiring the AC output current;

a voltage reference source for providing a first reference voltage and a second reference voltage, the first reference voltage more positive that the second reference voltage;

a signal generator for generating a reference signal that varies between a maximum voltage that is more positive that the first reference voltage and a minimum voltage that is less positive than the second reference voltage;

a first comparator connected to the signal generator and the voltage reference source so as to compare the reference signal to the first reference voltage and provide as an output a first series of output pulses;

a second comparator connected to the signal generator and the voltage reference source so as to compare the reference signal to the second reference voltage and provide as an output a second series of output pulses;

a third comparator connected to the signal generator and the voltage reference source so as to compare the reference signal to the second reference voltage and provide as an output a third series of output pulses;

a fourth comparator connected to the signal generator and the voltage reference source so as to compare the reference signal to the first reference voltage and provide as an output a fourth series of output pulses;

a first electronic switch having a control terminal, a first switched terminal, and a second switched terminal, the two switched terminals connected together while an output pulse is applied to the control terminal, the control terminal connected to the output of the first comparator, the first switched terminal connected to the first DC input terminal, and the second switched terminal connected to the first output terminal;

a second electronic switch having a control terminal, a first switched terminal, and a second switched terminal, the two switched terminals connected together while an output pulse is applied to the control terminal, the control terminal connected to the output of the second comparator, the first switched terminal connected to the first output terminal, and the second switched terminal connected to the second DC input terminal;

a third electronic switch having a control terminal, a first switched terminal, and a second switched terminal, the two switched terminals connected together while an output pulse is applied to the control terminal, the control terminal connected to the output of the third comparator, the first switched terminal connected to the first DC input terminal, and the second switched terminal connected to the second output terminal; and

a fourth electronic switch having a control terminal, a first switched terminal, and a second switched terminal, the two switched terminals connected together while an output pulse is applied to the control terminal, the control terminal connected to the output of the fourth comparator, the first switched terminal connected to the second output terminal, and the second switched terminal connected to the second DC input terminal.

9. The electronic circuit as defined in claim 8, wherein the waveform of the reference signal is preselected so that the reference signal crosses the voltage range between the reference voltages in a preselected time and remains more positive than the first reference voltage for approximately the same time that it remains below the second reference voltage.

10. The DC to AC inverter as defined in claim 9, wherein:

the first series of output pulses are positive-going pulses each lasting during the time that the reference signal is less positive than the first reference voltage;

the second series of output pulses are positive-going pulses each lasting during the time that the reference signal is less positive than the second reference voltage;

the third series of output pulses are positive-going pulses each lasting during the time that the reference signal is more positive than the second reference voltage;

the fourth series of output pulses are positive-going pulses each lasting during the time that the reference signal is more positive than the first reference voltage;

the first electronic switch is an P-channel MOSFET, the gate of which is connected to the output of the first comparator, the source of which is connected to the first output terminal, and the drain of which is connected to the first DC input terminal;

the second electronic switch is an N-channel MOSFET, the gate of which is connected to the output of the second comparator, the source of which is connected to the second DC input terminal, and the drain of which is connected to the first output terminal;

the third electronic switch is an P-channel MOSFET, the gate of which is connected to the output of the third comparator, the source of which is connected to second output terminal, and the drain of which is connected to the first DC input terminal; and

the fourth electronic switch is an N-channel MOSFET, the gate of which is connected to the output of the fourth comparator, the source of which is connected to the second DC input terminal, and the drain of which is connected to the second output terminal.

11. The electronic circuit as defined in claim 10, wherein the voltage reference source comprises a voltage divider connected between the first DC input terminal and the second DC input terminal, the voltage divider providing the first reference voltage and the second reference voltage;

12. The electronic circuit as defined in claim 11, wherein the voltage divider comprises a resistive voltage ladder.

13. The electronic circuit as defined in claim 12, wherein the resistive voltage ladder further provides a DC-offset reference voltage between the first reference voltage and the second reference voltage and the electronic circuit further comprises a voltage follower connected between the resistive voltage ladder and the signal generator so as to provide the DC-offset reference voltage to the signal generator.

14. The electronic circuit as defined in claim 13, wherein:

the signal generator comprises an operational amplifier configured as a relaxation oscillator so that the time-varying signal has a generally triangular waveform;

the voltage follower comprises an operational amplifier; and

the comparators comprise operational amplifiers.

15. A DC to AC inverter for providing an AC output current from a DC supply current, comprising:

a first DC input terminal and a second DC input terminal, the first DC input terminal for connection to the DC supply current at a more positive voltage than the second DC input terminal;

first and second output terminals for connection to a device requiring the AC output current;

a voltage reference source for providing a first reference voltage and a second reference voltage, the first reference voltage more positive that the second reference voltage;

a signal generator for generating a reference signal that varies between a maximum voltage that is more positive that the first reference voltage and a minimum voltage that is less positive than the second reference voltage;

a first comparator connected to the signal generator and the voltage reference source so as to compare the reference signal to the first reference voltage and provide as an output a first series of output pulses;

a second comparator connected to the signal generator and the voltage reference source so as to compare the reference signal to the second reference voltage and provide as an output a second series of output pulses;

a first electronic switch having a control terminal, a first switched terminal, and a second switched terminal, the two switched terminals connected together while an output pulse is applied to the control terminal, the control terminal connected to the output of the second comparator, the first switched terminal connected to the first DC input terminal, and the second switched terminal connected to the first output terminal;

a second electronic switch having a control terminal, a first switched terminal, and a second switched terminal, the two switched terminals connected together while an output pulse is applied to the control terminal, the control terminal connected to the output of the first comparator, the first switched terminal connected to the first output terminal, and the second switched terminal connected to the second DC input terminal;

a third electronic switch having a control terminal, a first switched terminal, and a second switched terminal, the two switched terminals connected together while an output pulse is applied to the control terminal, the control terminal connected to the output of the first comparator, the first switched terminal connected to the first DC input terminal, and the second switched terminal connected to the second output terminal; and

a fourth electronic switch having a control terminal, a first switched terminal, and a second switched terminal, the two switched terminals connected together while an output pulse is applied to the control terminal, the control terminal connected to the output of the second comparator, the first switched terminal connected to the second output terminal, and the second switched terminal connected to the second DC input terminal.

16. The DC to AC inverter as defined in claim 15, wherein the waveform of the reference signal is preselected so that the reference signal crosses the voltage range between the reference voltages in a preselected time and remains more positive than the first reference voltage for approximately the same time that it remains below the second reference voltage.

17. The DC to AC inverter as defined in claim 16, wherein:

the first comparator provides as an output a first series of positive-going output pulses each lasting during the time that the reference signal is more positive than the first reference voltage; and

the second comparator provides as an output a second series of positive-going output pulses each lasting during the time that the reference signal is less positive than the second reference voltage,

further comprising;

a first buffer connected to the output of the first comparator so as to buffer the first comparator and provide the first series of positive-going output pulses at its output;

a first buffer/inverter connected to the output of the first comparator so as to buffer the first comparator and provide a series of zero-going output pulses that are the inverse of the first series of positive-going output pulses at its output;

a second buffer connected to the output of the second comparator so as to buffer the second comparator and provide the second series of positive-going output pulses at its output;

a second buffer/inverter connected to the output of the second comparator so as to buffer the second comparator and provide a series of zero-going output pulses that are the inverse of the second series of positive-going output pulses at its output, and

wherein;

the first electronic switch is an P-channel MOSFET, the gate of which is connected to the output of the second buffer/inverter, the source of which is connected to the first output terminal, and the drain of which is connected to the DC input terminal;

the second electronic switch is an N-channel MOSFET, the gate of which is connected to the output of the first buffer, the source of which is connected to the second DC input terminal, and the drain of which is connected to the first output terminal;

the third electronic switch is an P-channel MOSFET, the gate of which is connected to the output of the first buffer/inverter, the source of which is connected to second output terminal, and the drain of which is connected to the DC input terminal; and

the fourth electronic switch is an N-channel MOSFET, the gate of which is connected to the output of the second buffer, the source of which is connected to the second DC input terminal, and the drain of which is connected to the second output terminal.

18. The electronic circuit as defined in claim 17, wherein the voltage reference source comprises a voltage divider connected between the first DC input terminal and the second DC input terminal, the voltage divider providing the first reference voltage and the second reference voltage;

19. The electronic circuit as defined in claim 18, wherein the voltage divider comprises a resistive voltage ladder.

20. The electronic circuit as defined in claim 19, wherein the resistive voltage ladder further provides a DC-offset reference voltage between the first reference voltage and the second reference voltage and the electronic circuit further comprises a voltage follower connected between the resistive voltage ladder and the signal generator so as to provide the DC-offset reference voltage to the signal generator.

21. The electronic circuit as defined in claim 20, wherein:

the signal generator comprises an operational amplifier configured as a relaxation oscillator so that the time-varying signal has a generally triangular waveform;

the voltage follower comprises an operational amplifier;

the comparators comprise operational amplifiers; and

the buffers and buffer/inverters comprise operational amplifiers.

22. The DC to AC inverter as defined in claim 16, wherein:

the first comparator provides as an output a first series of positive-going output pulses each lasting during the time that the reference signal is more positive than the first reference voltage; and

the second comparator provides as an output a second series of positive-going output pulses each lasting during the time that the reference signal is more positive than the second reference voltage,

further comprising;

a first buffer connected to the output of the first comparator so as to buffer the first comparator and provide the first series of positive-going output pulses at its output;

a first buffer/inverter connected to the output of the first comparator so as to buffer the first comparator and provide a series of zero-going output pulses that are the inverse of the first series of positive-going output pulses at its output;

a second buffer connected to the output of the second comparator so as to buffer the second comparator and provide the second series of positive-going output pulses at its output; and

a second buffer/inverter connected to the output of the second comparator so as to buffer the second comparator and provide a series of zero-going output pulses that are the inverse of the second series of positive-going output pulses at its output, and

wherein;

the first electronic switch is an P-channel MOSFET, the gate of which is connected to the output of the second buffer, the source of which is connected to the first output terminal, and the drain of which is connected to the DC input terminal;

the second electronic switch is an N-channel MOSFET, the gate of which is connected to the output of the first buffer, the source of which is connected to the second DC input terminal, and the drain of which is connected to the first output terminal;

the third electronic switch is an P-channel MOSFET, the gate of which is connected to the output of the first buffer/inverter, the source of which is connected to second output terminal, and the drain of which is connected to the DC input terminal; and

the fourth electronic switch is an N-channel MOSFET, the gate of which is connected to the output of the second buffer/inverter, the source of which is connected to the second DC input terminal, and the drain of which is connected to the second output terminal.

23. The electronic circuit as defined in claim 22, wherein the voltage reference source comprises a voltage divider connected between the first DC input terminal and the second DC input terminal, the voltage divider providing the first reference voltage and the second reference voltage;

24. The electronic circuit as defined in claim 23, wherein the voltage divider comprises a resistive voltage ladder.

25. The electronic circuit as defined in claim 24, wherein the resistive voltage ladder further provides a DC-offset reference voltage between the first reference voltage and the second reference voltage and the electronic circuit further comprises a voltage follower connected between the resistive voltage ladder and the signal generator so as to provide the DC-offset reference voltage to the signal generator.

26. The electronic circuit as defined in claim 25, wherein:

the signal generator comprises an operational amplifier configured as a relaxation oscillator so that the time-varying signal has a generally triangular waveform;

the voltage follower comprises an operational amplifier;

the comparators comprise operational amplifiers; and

the buffers and buffer/inverters comprise operational amplifiers.

27. The DC to AC inverter as defined in claim 16, wherein:

the first comparator provides as an output a first series of positive-going output pulses each lasting during the time that the reference signal is less positive than the first reference voltage; and

the second comparator provides as an output a second series of positive-going output pulses each lasting during the time that the reference signal is less positive than the second reference voltage,

further comprising;

a first buffer connected to the output of the first comparator so as to buffer the first comparator and provide the first series of positive-going output pulses at its output;

a first buffer/inverter connected to the output of the first comparator so as to buffer the first comparator and provide a series of zero-going output pulses that are the inverse of the first series of positive-going output pulses at its output;

a second buffer connected to the output of the second comparator so as to buffer the second comparator and provide the second series of positive-going output pulses at its output; and

a second buffer/inverter connected to the output of the second comparator so as to buffer the second comparator and provide a series of zero-going output pulses that are the inverse of the second series of positive-going output pulses at its output, and

wherein;

the first electronic switch is an P-channel MOSFET, the gate of which is connected to the output of the second buffer/inverter, the source of which is connected to the first output terminal, and the drain of which is connected to the DC input terminal;

the second electronic switch is an N-channel MOSFET, the gate of which is connected to the output of the first buffer/inverter, the source of which is connected to the second DC input terminal, and the drain of which is connected to the first output terminal;

the third electronic switch is an P-channel MOSFET, the gate of which is connected to the output of the first buffer, the source of which is connected to second output terminal, and the drain of which is connected to the DC input terminal; and

the fourth electronic switch is an N-channel MOSFET, the gate of which is connected to the output of the second buffer, the source of which is connected to the second DC input terminal, and the drain of which is connected to the second output terminal.

28. The electronic circuit as defined in claim 27, wherein the voltage reference source comprises a voltage divider connected between the first DC input terminal and the second DC input terminal, the voltage divider providing the first reference voltage and the second reference voltage;

29. The electronic circuit as defined in claim 28, wherein the voltage divider comprises a resistive voltage ladder.

30. The electronic circuit as defined in claim 29, wherein the resistive voltage ladder further provides a DC-offset reference voltage between the first reference voltage and the second reference voltage and the electronic circuit further comprises a voltage follower connected between the resistive voltage ladder and the signal generator so as to provide the DC-offset reference voltage to the signal generator.

31. The electronic circuit as defined in claim 30, wherein:

the signal generator comprises an operational amplifier configured as a relaxation oscillator so that the time-varying signal has a generally triangular waveform;

the voltage follower comprises an operational amplifier;

the comparators comprise operational amplifiers; and

the buffers and buffer/inverters comprise operational amplifiers.

32. The DC to AC inverter as defined in claim 16, wherein:

the first comparator provides as an output a first series of positive-going output pulses each lasting during the time that the reference signal is less positive than the first reference voltage; and

the second comparator provides as an output a second series of positive-going output pulses each lasting during the time that the reference signal is more positive than the second reference voltage,

further comprising;

a first buffer connected to the output of the first comparator so as to buffer the first comparator and provide the first series of positive-going output pulses at its output;

a first buffer/inverter connected to the output of the first comparator so as to buffer the first comparator and provide a series of zero-going output pulses that are the inverse of the first series of positive-going output pulses at its output;

a second buffer connected to the output of the second comparator so as to buffer the second comparator and provide the second series of positive-going output pulses at its output; and

a second buffer inverter connected to the output of the second comparator so as to buffer the second comparator and provide a series of zero-going output pulses that are the inverse of the second series of positive-going output pulses at its output, and

wherein;

the first electronic switch that is an P-channel MOSFET, the gate of which is connected to the output of the second buffer, the source of which is connected to the first output terminal, and the drain of which is connected to the DC input terminal;

the second electronic switch that is an N-channel MOSFET, the gate of which is connected to the output of the first buffer/inverter, the source of which is connected to the second DC input terminal, and the drain of which is connected to the first output terminal;

the third electronic switch that is an P-channel MOSFET, the gate of which is connected to the output of the first buffer, the source of which is connected to second output terminal, and the drain of which is connected to the DC input terminal; and

the fourth electronic switch that is an N-channel MOSFET, the gate of which is connected to the output of the second buffer/inverter, the source of which is connected to the second DC input terminal, and the drain of which is connected to the second output terminal.

33. The electronic circuit as defined in claim 32, wherein the voltage reference source comprises a voltage divider connected between the first DC input terminal and the second DC input terminal, the voltage divider providing the first reference voltage and the second reference voltage;

34. The electronic circuit as defined in claim 33, wherein the voltage divider comprises a resistive voltage ladder.

35. The electronic circuit as defined in claim 34, wherein the resistive voltage ladder further provides a DC-offset reference voltage between the first reference voltage and the second reference voltage and the electronic circuit further comprises a voltage follower connected between the resistive voltage ladder and the signal generator so as to provide the DC-offset reference voltage to the signal generator.

36. The electronic circuit as defined in claim 35, wherein:

the signal generator comprises an operational amplifier configured as a relaxation oscillator so that the time-varying signal has a generally triangular waveform;

the voltage follower comprises an operational amplifier;

the comparators comprise operational amplifiers; and

the buffers and buffer/inverters comprise operational amplifiers.

37. An electronic circuit, comprising:

a voltage reference source for providing a first reference voltage and a second reference voltage, the first reference voltage more positive that the second reference voltage;

a signal generator for generating a reference signal that varies between a maximum voltage that is more positive that the first reference voltage and a minimum voltage that is less positive than the second reference voltage;

a first comparator connected to the signal generator and the voltage reference source so as to compare the reference signal to the first reference voltage and provide as an output a first series of output pulses each of which lasts during a discrete interval during which the reference signal is more positive than the first reference voltage; and

a second comparator connected to the signal generator and the voltage reference source so as to compare the reference signal to the second reference voltage and provide as an output a second series of output pulses each of which lasts during a discrete interval during which the reference signal is less positive than the second reference voltage.

38. The electronic circuit as defined in claim 37, wherein the voltage reference source comprises a voltage divider connected between the first DC input terminal and the second DC input terminal, the voltage divider providing the first reference voltage and the second reference voltage;

39. The electronic circuit as defined in claim 38, wherein the voltage divider comprises a resistive voltage ladder.

40. The electronic circuit as defined in claim 39, wherein the resistive voltage ladder further provides a DC-offset reference voltage between the first reference voltage and the second reference voltage and the electronic circuit further comprises a voltage follower connected between the resistive voltage ladder and the signal generator so as to provide the DC-offset reference voltage to the signal generator.

41. The electronic circuit as defined in claim 37, wherein the output pulses are positive going pulses.

42. The electronic circuit as defined in claim 41, wherein the voltage reference source comprises a voltage divider connected between the first DC input terminal and the second DC input terminal, the voltage divider providing the first reference voltage and the second reference voltage;

43. The electronic circuit as defined in claim 42, wherein the voltage divider comprises a resistive voltage ladder.

44. The electronic circuit as defined in claim 43, wherein the resistive voltage ladder further provides a DC-offset reference voltage between the first reference voltage and the second reference voltage and the electronic circuit further comprises a voltage follower connected between the resistive voltage ladder and the signal generator so as to provide the DC-offset reference voltage to the signal generator.

45. An electronic circuit, comprising:

a voltage reference source for providing a first reference voltage and a second reference voltage, the first reference voltage more positive that the second reference voltage;

a signal generator for generating a reference signal that varies between a maximum voltage that is more positive that the first reference voltage and a minimum voltage that is less positive than the second reference voltage;

a first comparator connected to the signal generator and the voltage reference source so as to compare the reference signal to the first reference voltage and provide as an output a first series of output pulses each of which lasts during a discrete interval during which the reference signal is more positive than the first reference voltage; and

a second comparator connected to the signal generator and the voltage reference source so as to compare the reference signal to the second reference voltage and provide as an output a second series of output pulses each of which lasts during a discrete interval during which the reference signal is more positive than the second reference voltage.

46. The electronic circuit as defined in claim 45, wherein the voltage reference source comprises a voltage divider connected between the first DC input terminal and the second DC input terminal, the voltage divider providing the first reference voltage and the second reference voltage;

47. The electronic circuit as defined in claim 46, wherein the voltage divider comprises a resistive voltage ladder.

48. The electronic circuit as defined in claim 47, wherein the resistive voltage ladder further provides a DC-offset reference voltage between the first reference voltage and the second reference voltage and the electronic circuit further comprises a voltage follower connected between the resistive voltage ladder and the signal generator so as to provide the DC-offset reference voltage to the signal generator.

49. The electronic circuit as defined in claim 45, wherein the output pulses are positive going pulses.

50. The electronic circuit as defined in claim 49, wherein the voltage reference source comprises a voltage divider connected between the first DC input terminal and the second DC input terminal, the voltage divider providing the first reference voltage and the second reference voltage;

51. The electronic circuit as defined in claim 50, wherein the voltage divider comprises a resistive voltage ladder.

52. The electronic circuit as defined in claim 51, wherein the resistive voltage ladder further provides a DC-offset reference voltage between the first reference voltage and the second reference voltage and the electronic circuit further comprises a voltage follower connected between the resistive voltage ladder and the signal generator so as to provide the DC-offset reference voltage to the signal generator.