System and method of measuring a signal propagation delay
First Claim
1. A system for measuring a signal propagation delay, said system being adapted to electrically communicate with at least one transmitter and at least one receiver, said system comprising:
- a first bit sequence generator used to generate a first sequence of bits that is to be transmitted through an object with an unknown propagation delay, a second bit sequence generator that receives said first sequence of bits from said object, said second bit sequence generator generating a second sequence of bits identical to said first sequence; and
a controller that receives said first and second sequences of bits, said controller compares said sequences to confirm that said sequences are identical, instructs said first bit sequence generator to inject a predefined bit error into a third sequence of bits while simultaneously starting a clock count from a clock source, maintains said count that is incremented each time said controller checks for said bit error, stops incrementing said count when said bit error is detected, and computes said propagation delay by reference to said count.
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Accused Products
Abstract
The present invention relates generally to an improvement in the ability of test systems to test bit processing capacities of electronic devices, and in particular an improvement in their ability to measure a signal propagation delay through an object connected to an optoelectronic device. The present invention includes determining for how long after a specific bit or bit group is transmitted by an optical transceiver the bit or bit group is received at the other end of the object connected to the optical transceiver.
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Citations
20 Claims
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1. A system for measuring a signal propagation delay, said system being adapted to electrically communicate with at least one transmitter and at least one receiver, said system comprising:
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a first bit sequence generator used to generate a first sequence of bits that is to be transmitted through an object with an unknown propagation delay, a second bit sequence generator that receives said first sequence of bits from said object, said second bit sequence generator generating a second sequence of bits identical to said first sequence; and
a controller that receives said first and second sequences of bits, said controller compares said sequences to confirm that said sequences are identical, instructs said first bit sequence generator to inject a predefined bit error into a third sequence of bits while simultaneously starting a clock count from a clock source, maintains said count that is incremented each time said controller checks for said bit error, stops incrementing said count when said bit error is detected, and computes said propagation delay by reference to said count. - View Dependent Claims (2, 3, 4, 5, 6, 7)
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8. In a system for measuring a signal propagation delay, said system being adapted to electrically communicate with at least one transmitter and at least one receiver, said system comprising a first bit sequence generator, a second bit sequence generator, a clock source and a controller, a method for computing the signal propagation delay comprising the steps of:
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computing an ideal delay value;
injecting an error into a bit sequence generated by the bit sequence generators and maintaining a clock count from the clock source until the controller receives said error;
determining a bit position for said error in said bit sequence; and
calculating the propagation delay from said ideal delay value, said clock count and said bit position. - View Dependent Claims (9, 10, 11, 12, 13)
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14. In a computerized system comprising a circuit board having electrical circuitry connecting a first bit sequence (BS) generator, a serializer/deserializer (SERDES), a programmable delay, a deserializer, a second BS generator, a controller, and a clock source, said system further comprising an transmitter and a receiver electrically connected to the circuit board, a method for computing a signal propagation delay through an object comprising the steps of:
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initializing the first bit sequence (BS) generator, the serializer/deserializer (SERDES), the programmable delay, the deserializer, the second BS generator, the controller, the clock source, the circuit board, the transmitter and the receiver;
aligning data from the receiver with a clock signal from the clock source and storing a clock counter value;
identifying an ideal delay value for the programmable delay;
using said ideal delay value to gather data needed to determine the propagation delay; and
calculating the propagation delay using said data. - View Dependent Claims (15, 16, 17, 18, 19, 20)
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Specification