Semiconductor device comprising transition detecting circuit and method of activating the same

• US 20040123085A1
• Filed: 12/19/2002
• Published: 06/24/2004
• Est. Priority Date: 12/19/2002
• Status: Active Grant

• Current Assignee: Infineon Technologies AG, Kabushiki Kaisha Toshiba (Toshiba Corporation)
• Original Assignee: Qimonda AG (Infineon Technologies AG)
• Inventors: Takashima, Daisaburo, Oikawa, Kohei, Takeuchi, Yoshiaki, Shiratake, Shinichiro, Roehr, Thomas
• Granted Patent: US 7,127,598 B2
• Time in Patent Office: Days
• US Class Current: 713/1
• CPC Class Codes: G06F 1/24 Resetting means

Abstract

A semiconductor device includes an internal power supply, at least one semiconductor circuit block, a delay circuit, and a detecting circuit. The internal power supply outputs an initialization completion signal when initialized. The semiconductor circuit block operates on the basis of a voltage generated by the internal power supply. The delay circuit delays the initialization completion signal. The detecting circuit commands the semiconductor circuit block to start operations in response to the initialization completion signal delayed by the delay circuit and an externally input first input signal.

Claims

1. A semiconductor device comprising:

an internal power supply which outputs an initialization completion signal when the power supply is initialized;

at least one semiconductor circuit block which operates on the basis of a voltage generated by the internal power supply;

a delay circuit which delays the initialization completion signal; and

a detecting circuit which commands the semiconductor circuit block to start operations in response to the initialization completion signal delayed by the delay circuit and an externally input first input signal.

2. The semiconductor device according to claim 1, wherein the detecting circuit comprises a logic circuit which performs a logical operation on the first input signal and the initialization completion signal delayed by the delay circuit, and

a control circuit which commands the semiconductor circuit block to start operations upon detecting a transition in at least one of the result of the logical operation performed by the logic circuit and an externally input second input signal.

3. The semiconductor device according to claim 2, wherein the internal power supply supplies the initialization completion signal to the semiconductor circuit block and the control circuit, and upon receiving the input initialization completion signal, the semiconductor circuit block and the control circuit become active, and

wherein after receiving the input initialization completion signal, the semiconductor circuit block starts operation when commanded by the control circuit to start operations.

4. The semiconductor device according to claim 3, wherein the delay circuit delays the initialization completion signal input to the logic circuit for the time required to transmit the initialization completion signal from the internal power supply to at least one of the semiconductor circuit block and the control circuit.

5. The semiconductor device according to claim 3, wherein the delay circuit delays the initialization completion signal for the time required to make the semiconductor circuit block and the control circuit active.

6. The semiconductor device according to claim 3, wherein the delay circuit is a signal wire which transmits the initialization completion signal from the internal power supply to the logic circuit via at least one of the control circuit and the semiconductor circuit block.

7. The semiconductor device according to claim 2, wherein the logic circuit performs a logical AND operation on the initialization completion signal and the first input signal.

8. The semiconductor device according to claim 1, wherein at least one semiconductor circuit block is a non-volatile memory.

9. The semiconductor device according to claim 8, wherein the non-volatile memory is one of a flash memory and a ferroelectric memory.

10. A semiconductor device comprising:

an internal power supply which outputs an initialization completion signal when the power supply is initialized;

at least one semiconductor circuit block which is made active upon receiving the input initialization completion signal and which operates on the basis of a voltage generated by the internal power supply;

a control circuit which is made active upon receiving the input initialization completion signal; and

a logic circuit which performs a logical operation on an externally input first input signal and an enable signal output by at least one of the semiconductor circuit block and the control circuit when one of the semiconductor circuit block and the control circuit is made active, the control circuit commanding the semiconductor circuit block to start operations according to the result of the logical operation performed by the logic circuit and an externally input second input signal.

11. The semiconductor device according to claim 10, wherein after receiving the input initialization completion signal, the semiconductor circuit block starts operation when commanded by the control circuit to start operations.

12. The semiconductor device according to claim 10, wherein the enable signal corresponds to the initialization completion signal transmitted through one of the semiconductor circuit block and the control circuit from the internal power supply and then output by one of the semiconductor circuit block and the control circuit.

13. The semiconductor device according to claim 10, wherein the logic circuit performs a logical AND operation on the enable signal and the first input signal.

14. The semiconductor device according to claim 10, wherein the control circuit commands the semiconductor circuit block to start operations upon detecting a transition in at least one of the result of the logical operation and the second input signal.

15. The semiconductor device according to claim 10, wherein at least one semiconductor circuit block is a non-volatile memory.

16. The semiconductor device according to claim 15, wherein the non-volatile memory is one of a flash memory and a ferroelectric memory.

17. A method of activating a semiconductor device, the method comprising:

externally inputting first and second input signals to the semiconductor device;

turning an internal power supply on;

allowing, when the internal power supply is completely initialized, the internal power supply to output a third input signal to a semiconductor circuit block and a control circuit to make the semiconductor circuit block and the control circuit active, and inputting the third input signal to a delay circuit;

performing a logical operation on the first input signal and the third input signal delayed by the delay circuit; and

allowing the control circuit to command the semiconductor circuit block to start operations upon detecting a transition in at least one of the result of the logical calculation and the second input signal.

18. The semiconductor activating method according to claim 17, wherein the delay circuit delays the third input signal by the time period from the output of a third input signal from the internal power supply until at least the semiconductor block and the control circuit become active.

19. The semiconductor activating method according to claim 17, wherein after receiving the input third input signal, the semiconductor circuit block starts operation when commanded by the control circuit to start operations.

20. A method of activating a semiconductor device, the method comprising:

externally inputting a first and second input signals to the semiconductor device;

turning an internal power supply on;

allowing, when the internal power supply is completely initialized, the internal power supply to output a third input signal to a semiconductor circuit block and a control circuit to make the semiconductor circuit block and the control circuit active;

allowing at least one of the semiconductor circuit block and the control circuit to output an enable signal after receiving the third input signal;

performing a logical operation on the enable signal and the first input signal; and

allowing the control circuit to command the semiconductor circuit block to start operations upon detecting a transition in at least one of the result of the logical calculation and the second input signal.

21. The semiconductor activating method according to claim 20, wherein after receiving the input third input signal, the semiconductor circuit block starts operation when commanded by the control circuit to start operations.